Author Topic: How to determine if PLL 4046 is locked?  (Read 10790 times)

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Offline ZeroResistanceTopic starter

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How to determine if PLL 4046 is locked?
« on: August 11, 2018, 12:47:29 pm »
I am trying a Class E amplier with a PLL 4046. I see certain a half sine wave across the resonant capacitor, but I have no idea if the PLL is working as intended, bascally I plan to make a small dielectric heater, and I want to keep the gate pulses in phase with the sine wave output, that is always switch on the mosfet at zero voltage / zero current even if the load capacitor varies.
I have attached my circuit and some oscilloscope waveforms.

 

Offline Lee Leduc

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Re: How to determine if PLL 4046 is locked?
« Reply #1 on: August 11, 2018, 01:28:02 pm »
 
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Offline iMo

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Re: How to determine if PLL 4046 is locked?
« Reply #2 on: August 11, 2018, 01:35:30 pm »
Pin 1 High when locked??
 
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Offline ZeroResistanceTopic starter

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Re: How to determine if PLL 4046 is locked?
« Reply #3 on: August 11, 2018, 01:39:07 pm »
Application note for 4046. http://www.ti.com/lit/an/scha003b/scha003b.pdf

Thanks for the reference, additionally whats bugging me is the feedack that I derive from the tank capacitor then give it via current limiting resistor to the diodes (1N4148). I was expecting a square wave here between 0 to 15V but I get quite low level over there.
 

Offline Lee Leduc

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Re: How to determine if PLL 4046 is locked?
« Reply #4 on: August 11, 2018, 01:51:25 pm »
Here's another TI appnote. See Figure 15. http://www.ti.com/lit/an/scha002a/scha002a.pdf
 
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Offline ZeroResistanceTopic starter

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Re: How to determine if PLL 4046 is locked?
« Reply #5 on: August 11, 2018, 02:04:17 pm »
Pin 1 High when locked??
I am using the HEF4046 and its Pin 1 is given as "Phase Pulses". I'm getting a square wave on that pin.
 

Offline Benta

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Re: How to determine if PLL 4046 is locked?
« Reply #6 on: August 11, 2018, 02:08:49 pm »
You are using PFD I. This one locks at appr. 90 degrees offset between VCO and input.
If you want 0 degrees lock, you need to use PFD II.
CAUTION: the PFD II needs an active loop filter to lock, it will NOT lock with the simple RC filter (Even though data sheet and TI app notes suggest it).

« Last Edit: August 11, 2018, 04:16:24 pm by Benta »
 
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Offline iMo

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Re: How to determine if PLL 4046 is locked?
« Reply #7 on: August 11, 2018, 03:39:24 pm »
Pin 1 High when locked??
I am using the HEF4046 and its Pin 1 is given as "Phase Pulses". I'm getting a square wave on that pin.
According to the HEF4046 datasheet the PIN1 (PCP_OUT) indicates "locked" with High when Phase comparator 2 is in use (High at PIN1 means the both high- and low-side charge pump transistors are OFF, and when the both are OFF it means no charge is needed to be pushed into the filter because there is zero phase difference = "locked").

PS: With the XOR phase detector you have been using the "locked" state to indicate isn't easy. I do it in my GPSDO by measuring the voltage at the output of the XOR's low pass filter (opamp buffer and stm32's ADC). When the voltage is between, for example, 1.855-1.865V the PLL is considered "locked".
« Last Edit: August 11, 2018, 03:58:32 pm by imo »
 
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Offline ZeroResistanceTopic starter

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Re: How to determine if PLL 4046 is locked?
« Reply #8 on: August 11, 2018, 05:37:40 pm »
You are using PFD I. This one locks at appr. 90 degrees offset between VCO and input.
If you want 0 degrees lock, you need to use PFD II.
CAUTION: the PFD II needs an active loop filter to lock, it will NOT lock with the simple RC filter (Even though data sheet and TI app notes suggest it).

I am using a capacitor to couple the waveform to the input (Signal in), won't the capacitor introduce a phase shift of the said 90deg. Now I am thinking of using a optocoupler instead of the capacitor / diode circuit that was used? The opto might introduce is 180 deg out of phase.
Also I don't understand the part why the Phase Comparator locks only at 90 degre offset between VCO and input. I didn't find any such info in the data sheet
 

Offline ZeroResistanceTopic starter

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Re: How to determine if PLL 4046 is locked?
« Reply #9 on: August 11, 2018, 05:53:45 pm »
Pin 1 High when locked??
I am using the HEF4046 and its Pin 1 is given as "Phase Pulses". I'm getting a square wave on that pin.
According to the HEF4046 datasheet the PIN1 (PCP_OUT) indicates "locked" with High when Phase comparator 2 is in use (High at PIN1 means the both high- and low-side charge pump transistors are OFF, and when the both are OFF it means no charge is needed to be pushed into the filter because there is zero phase difference = "locked").

PS: With the XOR phase detector you have been using the "locked" state to indicate isn't easy. I do it in my GPSDO by measuring the voltage at the output of the XOR's low pass filter (opamp buffer and stm32's ADC). When the voltage is between, for example, 1.855-1.865V the PLL is considered "locked".
Sorry My bad its actually an HCF4046 from ST, it does have a "Phase Pulses" at pin 1 though and the datasheet indicates that a locked condition exists when the level of this pin goes high. Although the waveforms for this pin are only shown for phase comparator 2.
The real question I should be asking is based on the waveforms I have posted is the PLL in locked mode. And yes I checked the "Phase Pulses" pin and it shows a square wave and not a high signal which might indicate that it is not in lock right?

Whats the reason for the "1.855-1.865V the PLL is considered "locked""? Do you use 15V supply voltage?
« Last Edit: August 11, 2018, 06:24:14 pm by ZeroResistance »
 

Offline Benta

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Re: How to determine if PLL 4046 is locked?
« Reply #10 on: August 11, 2018, 06:01:39 pm »
It might be in lock. Reread my reply #6. The PFD I will only provide a frequency lock, not a phase lock. If the signal at pin 1 is a stable square wave, your loop is frequency locked as expected.


 
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Offline ZeroResistanceTopic starter

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Re: How to determine if PLL 4046 is locked?
« Reply #11 on: August 11, 2018, 06:28:46 pm »
It might be in lock. Reread my reply #6. The PFD I will only provide a frequency lock, not a phase lock. If the signal at pin 1 is a stable square wave, your loop is frequency locked as expected.
In the datasheet "Pin 1" is only referred to during Phase Comparator II operation, does it apply to Phase Comparator 1 also?
 

Offline Benta

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Re: How to determine if PLL 4046 is locked?
« Reply #12 on: August 11, 2018, 06:53:17 pm »
It might be in lock. Reread my reply #6. The PFD I will only provide a frequency lock, not a phase lock. If the signal at pin 1 is a stable square wave, your loop is frequency locked as expected.
In the datasheet "Pin 1" is only referred to during Phase Comparator II operation, does it apply to Phase Comparator 1 also?

Yes, insofar as the two PFDs are in parallel, and PFD II is forced to run out of lock when using PFD I, the pin 1 output indirectly also applies to PFD I.

 
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Offline ZeroResistanceTopic starter

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Re: How to determine if PLL 4046 is locked?
« Reply #13 on: August 11, 2018, 06:57:00 pm »
Okay so I'm adding some more waveforms here.
First waveform shows relation between VCO out and Signal In.
Second waveform shows the original resonant capacitor waveform that i wan to lock onto and Signal In (Derived from the resonant capacitor)

My question is Signal In required to be a square wave of CMOS levels. Or is the signal shown in the waveform a valid signal for the PLL to operate?
 

Offline T3sl4co1l

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Re: How to determine if PLL 4046 is locked?
« Reply #14 on: August 11, 2018, 07:22:44 pm »
You claimed "sine wave", but the output will never be a sine wave.  What are you really trying to do here? :)

If you have an output coupling network (seems likely, for dielectric heating?), put that in the loop!

FYI, because this circuit is self driven, it's never "out of lock", though you might be unhappy with how it is locked (i.e., out of phase, or unstable control loop).

It should be pretty easy to get it to behave.  Mind that you will need the two phase signals of interest: presumably, output voltage and resonant current.  You can't use the oscillator output directly due to phase shift through the driver and output chain.

Mind also that the kind of 4046 matters.  The original CD4046 is apparently the best, albeit probably too slow for this.  The 74HC4046 was a chintzy hackjob of a clone, with deadband in its type II detector, and a much worse (nonlinear, drifty) oscillator.  There are also "improved" versions (HC7046 and I think 9046?) that still aren't as good as the original (in all aspects but speed), and have another PFD type available.  (Disclaimer: this is what I've heard; I have had few PLL applications myself, so this is not first hand experience, let alone with data to back it up.)

You may well be better served with a semi-discrete solution: a VCO, driver, PFD and error amp, all separate components (probably still ICs, or gates or whatever, just not a single-chip solution).  That's how I design induction heaters (same thing, inductive rather than capacitive load).  Could also potentially use a frequency multiplier to get higher frequencies from a lower frequency osc/PLL, if that's a problem.

Tim
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Offline ZeroResistanceTopic starter

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Re: How to determine if PLL 4046 is locked?
« Reply #15 on: August 11, 2018, 07:48:07 pm »
You claimed "sine wave", but the output will never be a sine wave.  What are you really trying to do here? :)

I do see a half rectified kind of sine wave across the resonant capacitor.

Quote
If you have an output coupling network (seems likely, for dielectric heating?), put that in the loop!
i don't have any coupling network yet, i was planning to connect 2 parallel plates across the resonant capacitor and then put some material between the parallel plates to be heated.

Quote
FYI, because this circuit is self driven, it's never "out of lock", though you might be unhappy with how it is locked (i.e., out of phase, or unstable control loop).
I'm sorry I didn't get this. When I load the material into the output plates the resonant capacitor would change and so would the frequency. The would change the switching of the mosfets out of their zero voltage / zero voltage switching. I want to achieve zvs / zcs even though the capacitor and frequency changes.
It should be pretty easy to get it to behave.  Mind that you will need the two phase signals of interest: presumably, output voltage and resonant current.  You can't use the oscillator output directly due to phase shift through the driver and output chain.

Quote
Mind also that the kind of 4046 matters.  The original CD4046 is apparently the best, albeit probably too slow for this.  The 74HC4046 was a chintzy hackjob of a clone, with deadband in its type II detector, and a much worse (nonlinear, drifty) oscillator.  There are also "improved" versions (HC7046 and I think 9046?) that still aren't as good as the original (in all aspects but speed), and have another PFD type available.  (Disclaimer: this is what I've heard; I have had few PLL applications myself, so this is not first hand experience, let alone with data to back it up.)
I am currently using an HCF4046 from ST, altough it is not suitable for this application because I need a higher frequency preferably 3 to 5Mhz.

Quote
You may well be better served with a semi-discrete solution: a VCO, driver, PFD and error amp, all separate components (probably still ICs, or gates or whatever, just not a single-chip solution).  That's how I design induction heaters (same thing, inductive rather than capacitive load).  Could also potentially use a frequency multiplier to get higher frequencies from a lower frequency osc/PLL, if that's a problem.

Tim

Good Idea regarding the frequency multiplier..
So If I still want to continue using this chip for say 5Mhz would I need both a multiplier (for feeding to the mosfet driver) and divider for feed back into the signal input?
« Last Edit: August 11, 2018, 08:03:21 pm by ZeroResistance »
 

Offline iMo

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Re: How to determine if PLL 4046 is locked?
« Reply #16 on: August 11, 2018, 07:48:57 pm »
It might be in lock. Reread my reply #6. The PFD I will only provide a frequency lock, not a phase lock. If the signal at pin 1 is a stable square wave, your loop is frequency locked as expected.
In the datasheet "Pin 1" is only referred to during Phase Comparator II operation, does it apply to Phase Comparator 1 also?

Yes, insofar as the two PFDs are in parallel, and PFD II is forced to run out of lock when using PFD I, the pin 1 output indirectly also applies to PFD I.
The PIN1 "lock" indication will not work with PFD1 (the simple XOR). The XOR "continuosly wobbles" around the "lock" position, thus the PIN1 shows a square wave.
The PFDII when "locked" stops pumping the current into/from the filter, thus you get PIN1 high when the phase is zero (plus minus dead time for some 4046 variants).

Quote
Whats the reason for the "1.855-1.865V the PLL is considered "locked""? Do you use 15V supply voltage?
It was a "for example". The voltage at which the XOR PD is considered to be "locked" depends on many factors. It could be any voltage from almost 0V to almost 15V in your case.
« Last Edit: August 11, 2018, 07:51:25 pm by imo »
 
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Offline T3sl4co1l

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Re: How to determine if PLL 4046 is locked?
« Reply #17 on: August 11, 2018, 08:03:04 pm »
I'm sorry I didn't get this. When I load the material into the output plates the resonant capacitor would change and so would the frequency. The would change the switching of the mosfets out of their zero voltage / zero voltage switching. I want to achieve zvs / zcs even though the capacitor and frequency changes.
It should be pretty easy to get it to behave.  Mind that you will need the two phase signals of interest: presumably, output voltage and resonant current.  You can't use the oscillator output directly due to phase shift through the driver and output chain.

Yeah, you might not like what lock condition it's in, but it's never not in a lock condition.  In Diff Eq, this is a non-homogeneous system.  When the system is linear (as an RLC network is), the steady-state solutions are always at the driven frequency (assuming the "driver" is a periodic signal, of course).

In simpler terms: no matter what frequency you're driving at, the network is always doing whatever it's doing, at that same frequency.  There is no locking to be done*, because it's always locked on frequency.

*In the sense that the phase might go outside of (-pi, pi] (in terms of total phase, not modulo phase).

This makes PLLing a resonant network much easier than the general case (typically, a PLL locking to a completely arbitrary and separate signal, like for radio).  So that helps!

PLLing a class E stage (with no output network) is even easier still, because it's not resonant at all, as such.  It's quasi-resonant.  There's a half-sine* hump, then the voltage goes back to its initial state, and current goes back to ramping up.  The ramp duration is variable.  To a certain extent, you can drive over a wide frequency range, and get output power proportional to frequency (though this is probably prohibitive because of peak current and voltage demands on the switch).

*It's still not actually a sine part, but a segment of a decaying sinusoid.  And if we include real components, not even that, because MOSFET Coss is nonlinear, so the zero crossings are rather slower (more Coss at lower Vds) than expected.

Be very careful talking about precise things like waveforms!  If you say "sine wave", I fully expect something very tightly defined in the frequency domain: one spectral line, no distortion, no sidebands (maybe a DC offset, but strictly speaking, no).  As soon as you have "sine wave BUT", the spectrum goes out the window, and it simply doesn't have the properties of a sine wave, and should not be called that. :)

Tim
« Last Edit: August 11, 2018, 08:05:07 pm by T3sl4co1l »
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Offline iMo

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Re: How to determine if PLL 4046 is locked?
« Reply #18 on: August 11, 2018, 08:16:27 pm »
While trying to understand your schematics (I have to rotate my notebook upside down) - what the 10k pot-trimer actually does?
I think it cannot be wired that way..
Could you describe what the system shall actually do?
« Last Edit: August 11, 2018, 08:18:41 pm by imo »
 

Offline Benta

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Re: How to determine if PLL 4046 is locked?
« Reply #19 on: August 11, 2018, 08:22:16 pm »

My question is Signal In required to be a square wave of CMOS levels. Or is the signal shown in the waveform a valid signal for the PLL to operate?

Your first plot shows exactly what is to be expected from using PD I. A locked signal with appr. 90 degrees shift. The 4046 has an input amplifier, your input signal is perfectly OK. It works as it should.
And No, the XOR does not "continually wobble", no idea where that came from.
 

Offline iMo

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Re: How to determine if PLL 4046 is locked?
« Reply #20 on: August 11, 2018, 08:40:49 pm »
And No, the XOR does not "continually wobble", no idea where that came from.
 

Offline Benta

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Re: How to determine if PLL 4046 is locked?
« Reply #21 on: August 11, 2018, 08:53:10 pm »
And No, the XOR does not "continually wobble", no idea where that came from.

Your picture does not represent "wobble" in any way, the triangular waveform is synchronous to the PD and VCO and will not result in frequency or phase "wobble".

That aside, the scha002 and scha003 are the dodgiest application notes from TI ever, and were probably written by an intern during the summer vacation. I've ranted about those in other threads.

 

Online Zero999

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Re: How to determine if PLL 4046 is locked?
« Reply #22 on: August 11, 2018, 09:47:43 pm »
Here's a schematic of a tone decoder I found in a Forrest Mims book (I can't remember which one) I found awhile ago. It uses the '4001, D1, C4 and R5 as a tone decoder lock detector.
« Last Edit: August 11, 2018, 10:41:35 pm by Hero999 »
 
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Offline Benta

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Re: How to determine if PLL 4046 is locked?
« Reply #23 on: August 11, 2018, 10:33:15 pm »
Here's a schematic of a tone decoder I found in a Forrest Mims book (I can't remember which one) I found awhile ago. It uses the '4001, D1, C4 and R5 as a tone decoder.

???

 

Online Zero999

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Re: How to determine if PLL 4046 is locked?
« Reply #24 on: August 11, 2018, 10:42:15 pm »
Here's a schematic of a tone decoder I found in a Forrest Mims book (I can't remember which one) I found awhile ago. It uses the '4001, D1, C4 and R5 as a tone decoder.

???
Yes, my fingers were faster than my brain. Fixed.
 


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