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How to match Mosfet Gate Driver with Mosfet
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Rx7man:

--- Quote from: blundar on November 12, 2018, 05:10:40 am ---There are a plethora of such parts on the market.  It's going to boil down to how much current you need to switch.

Some of my favorite half bridges:
ST VNH5019AH
Infineon BTN8962A BTN8982A

Some of my favorite full(ish) bridges:
ST VNH7013AH
Infineon IFX007

All of these parts are designed to drive a decent amount of current with an inductive load more or less direct from a MCU.  They feature drivers, protection circuitry, integrated FETs and sometimes current sensing and/or diagnostics.  They're designed to be an "easy" button for designers compared to using a gate driver, discrete FETs and thinking.

--- End quote ---
I just found this device in a board I was reverse engineering... seems like a handy unit, optocoupler with push/pull output mosfets and hysteresis
https://www.mouser.ca/ProductDetail/782-VO3120
T3sl4co1l:

--- Quote from: blueskull on November 12, 2018, 07:06:13 pm ---For instance, if you have 100nH gate loop inductance (horrible design on a PCB, reasonable for a well designed PCB-less "soldering in the air" design), for IRF540 (Ciss=1.7nF, Vgs_nom=12V, Vgs_max=20V), at Q=1, R=2*sqrt(L/C)=15R.
For IR2111, Rout=15V/250mA=60R, >>15R, therefore you don't need any external gate resistance.

--- End quote ---

And what's more than that, note that Ciss is a small-signal, zero-bias condition that's basically meaningless for switching -- the average value over the switching event is usually about four times larger!  Fortunately, the datasheet also provides Qg(tot), which gives Cequiv = Qg/Vgs(on).

The exact situation that you're trying to avoid (VHF oscillation) is a bit different from the (~baseband) gate switching situation.  Mainly, it's important to avoid modest value capacitances on the gate trace, which leads to a tuned-gate oscillator as the MOSFET goes through the linear range (during the Miller plateau).  An IRF540 might oscillate at 50 to 100MHz; a modern SuperJunction type can oscillate at 400MHz, maybe more.

You don't usually have a capacitance nearby, so it's not usually an issue, but long trace lengths (= transmission line stubs) can do it, or attached components like zener diodes (for protection).

One easy way to address this, is putting a small ferrite bead in series with the gate lead.  During gate transition, the peak current causes the bead to saturate, so it has little effect on switching (basically it introduces a slight (~1ns?) delay), but it presents just enough lossy impedance to stop oscillation. :)

Tim
T3sl4co1l:
If there is no resistance, then the energy stored in the inductance corresponds to the charge deposited in C_eq.

If there is considerable resistance, then the (small signal) C_iss (at whatever Vds state is being considered) does dominate.

C_iss is only given as the smaller value (natch); you have to find it plotted in a graph to figure out the low-Vds condition.  Graphs are always typical data unless otherwise noted, so be careful with that, too.

C_eq being larger, will give a conservative estimate, suitable for design purposes, but not for more precise predictions.

If you are looking for accuracy, then indeed, simulation, or better yet real testing, is needed.

Tim
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