For instance, if you have 100nH gate loop inductance (horrible design on a PCB, reasonable for a well designed PCB-less "soldering in the air" design), for IRF540 (Ciss=1.7nF, Vgs_nom=12V, Vgs_max=20V), at Q=1, R=2*sqrt(L/C)=15R.
For IR2111, Rout=15V/250mA=60R, >>15R, therefore you don't need any external gate resistance.
And what's more than that, note that Ciss is a small-signal, zero-bias condition that's basically meaningless for switching -- the average value over the switching event is usually about four times larger! Fortunately, the datasheet also provides Qg(tot), which gives Cequiv = Qg/Vgs(on).
The exact situation that you're trying to avoid (VHF oscillation) is a bit different from the (~baseband) gate switching situation. Mainly, it's important to avoid modest value capacitances on the gate trace, which leads to a tuned-gate oscillator as the MOSFET goes through the linear range (during the Miller plateau). An IRF540 might oscillate at 50 to 100MHz; a modern SuperJunction type can oscillate at 400MHz, maybe more.
You don't usually have a capacitance nearby, so it's not usually an issue, but long trace lengths (= transmission line stubs) can do it, or attached components like zener diodes (for protection).
One easy way to address this, is putting a small ferrite bead in series with the gate lead. During gate transition, the peak current causes the bead to saturate, so it has little effect on switching (basically it introduces a slight (~1ns?) delay), but it presents just enough lossy impedance to stop oscillation.
Tim