| Electronics > Beginners |
| i2c level shifting/ pull-up and signal intigrity |
| (1/1) |
| hsn93:
hello, in designing i was following the below two guides: https://www.nxp.com/docs/en/application-note/AN10441.pdf and http://www.ti.com/lit/an/slva689/slva689.pdf i've RTC chip that uses i2c, 5v, and mcu 3v3 why level shifting?: note [6]: The I2C-bus is 5 V tolerant. and you can see VIH = 0.7 * Vdd = 0.7*5 = 3.5V. you can see my design here from Tr [1000nS] was for standard mode 100khz: and you can see that its not good at fast mode 400khz. although, the method for shifting in AN10441 is applicable for fast mode i2c. but, if i do the calculations (assuming voltage drop at Q1 and Q2 is 0V): Rp (min) @ 5v = 5v - 0.4v / 3mA = 0.92K ohm Rp (max) @ 5v or 3v3 = 300nS / 0.8743 * Cb[400pF] = 0.86K ohm Rp (min) @ 3v3 = 3.3 - 0.4 / 3mA = 0.96K ohm you can see that maximum resistor is less than minimum.... of course you the key is in IOL but i cant imagine that i put IOL more than 2mA !!!! or is it ????!!! there is also me imagining that 3ma is devided into the two resistors (Rpull up) at 5v and 3v3 so i should assume it ~ 1.5ma ?! that makes it worse. so my question how do i calculate the right values of pull up resistors? and by the way, 400pF (bus capacitance) is the worst case? (the more devices or longer traces/wires the more capacitance?) so it could be less than 400pF? |
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