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Impedance matching or not ? and choosing values for RC filter
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JeanF:
I’ve played around with component values yesterday. I’ve seen the influence of the values of the series resistor, the pullup resistor and the capacitor on the filtered waveform with regard to output voltage swing and carrier ripple, it was very interesting and it’s been a good learning experience.

I also looked more carefully at the 74HC14 datasheet and its threshold voltages; I interpolated for 5V supply because they are given for 4.5V and 6V supply. As it turns out I was just lucky it worked the other day, because the low threshold is about 1.5V and my signal had a lot of ripple in this region, so there was room for improvement.

So as per your recommendations I used a 2 stage RC filter, the series R of the 1st stage was kept low to increase the output swing, R=0 worked as well but I used a small value instead, to limit the peak discharge current in the opto’s output transistor.

Then I noticed that the output could be pulled even lower by increasing the pull-up resistor of the opto, but at the expense of the eye shape. In the end I used 1k5.

current (no pun intended) values:
Rpullup: 1k5
first stage: 150R / 10n
second stage: 10k / 1n

I am again very grateful for your help and I’m quite happy with the output waveform, there is now more than 0.5V of margin below the low Vth of the 74HC14, which looks (in my unexperienced point of view) good enough :)

In the next days I’ll be away from the bench, I’ll focus on the software side of things instead.
Later I’ll build the circuit more permanently on perfboard, I may as well look into other design options just for fun (cf. the other thread) and I’ll try to use a 6N139 instead, which uses less current. Time will tell if further adjustments are needed :)


fourfathom:
With the 1.5V threshold of the 'HC14 you might consider using an opto pull-up voltage closer to 3V.  This will reduce the amplitude of the eye pattern, but will also lower the low-state carrier ripple voltage and let you use a more aggressive first-stage filter.  If you have a clean 3.3V supply handy you could tie your 1.5K pull-up to that.  Here is a simulation where I used a 5V supply and a resistive voltage divider for the pull-up, and increased the first series resistor from 150 Ohm to 1K.  You can see that the eye pattern is better centered around the 'HC14 switching threshold, and the carrier ripple slope near the threshold never goes positive (which reduces the probability of spurious switching on the falling edge.)
JeanF:
On this picture I have drawn the high and low thresholds of the 'HC14, 1.58V and 2.63V.
So the goal is for the waveform to be symmetrical with respect to the line which is the average of those two, at 2.11V ? If I understand correctly this makes the 1s and 0s equal in duration?

Is it primarily for the peace of mind and taste for a job well done, or is it really important? As the receiver is supposed to sample the incoming signal at the middle of each bit, and will do it according to his own internal clock, I assume there will be some tolerance?

About the ripple slope at the switching thresholds, I would have thought this wasn't a problem, as a possible spur would need to be more than 1V in height to hit the high threshold and cause false switching, wouldn't it?

I'll try what you say next week :)
fourfathom:

--- Quote from: JeanF on October 08, 2019, 08:36:15 pm ---On this picture I have drawn the high and low thresholds of the 'HC14, 1.58V and 2.63V.
So the goal is for the waveform to be symmetrical with respect to the line which is the average of those two, at 2.11V ? If I understand correctly this makes the 1s and 0s equal in duration?

Is it primarily for the peace of mind and taste for a job well done, or is it really important? As the receiver is supposed to sample the incoming signal at the middle of each bit, and will do it according to his own internal clock, I assume there will be some tolerance?

About the ripple slope at the switching thresholds, I would have thought this wasn't a problem, as a possible spur would need to be more than 1V in height to hit the high threshold and cause false switching, wouldn't it?

I'll try what you say next week :)

--- End quote ---

Wait!!!  Don't try what I said, since that was done to center the eye around 1.5V.  According to your threshold values, 2.1V is the better goal, and the plain 1.5K pull-up is an appropriate value.  You might try increasing the 150 Ohm series resistor to improve the filtering and also bring the eye pattern crossover point closer to 2.1V (as you say, to give you a symmetrical duty cycle).  The exact DC level will depend on the effective duty-cycle of the 50KHz carrier after full-wave detection and the opto gain.  My simulation is unlikely to match your actual circuit in this regard.

You are correct, ripple on the edges won't cause multiple triggering unless it exceeds the hysteresis of the Schmitt trigger.  But when you add the inevitable noise to the waveform things can be worse than you anticipate.  Having steep rising and falling edges at the filter output is also a good thing, so there is a tradeoff here that involves the hysteresis and the filter frequency response slope. 

UARTs typically will detect the edge of the start bit, then using a high-speed clock sample all the following bits at what should be the halfway point.  Unless the signal is really distorted or noisy, this is a pretty robust technique, and much of the fine-tuning we are trying isn't strictly necessary.  But if you can improve the circuit at little or no cost, why not do it?  You will be improving the margins so it should be able to better handle a noisy interface.  Since you are dealing with a form of AM modulation, noise pickup can be a problem.
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