Using larger capacitors than in the datasheet of LDO regulator

[Egill]

Hi, I'm designing a board for a microcontroller and I need a 3.3V LDO on it for supplying power to the device. I have decided to use this particular LDO:

https://www.diodes.com/assets/Datasheets/AP2114.pdf


It is an an AP2114HA-3.3, manufactured by Diodes Incorporated. In the datasheet they recommend 4.7µF on both the input and output but I already have some 10µF capacitors elsewhere on the board and in an effort to reduce the number of different components, I was wondering if using two of those 10µF caps on the input and output of the LDO would be safe? The only effect I could think of was that the output of the LDO would rise slower to the regulation voltage but that shouldn't matter in this case. Will it disturb the control loop of the regulator or harm the circuit in any other way?

Thanks in advance,
Egill

[Kleinstein]

The larger capacitor before the regulator does not matter. There more capacitance is more like a good thing.
The capacitor at the output has an effect on the control loop. 10 µF vs 4.7 µF is not that far off and likely still OK. The 3.3 V version is also not the lowest voltage version and thus likely has a divider in the FB and thus possibly less loop gain than the lower voltage versions. So chances are good the stability would still be OK.  The DS does not explicitely tell which capacitors are OK and which not. So it would be something to test.

[mikeselectricstuff]

Datasheets usually mention if there are upper limits on capacitance.
10uf ceramics will probably be closer to 4.7uf anyway once they have some voltage across them !

The only thing to watch is very old regulator designs ( e.g. LP2P50) which may not be happy with the very low ESR of ceramic caps, which weren't common when they were designed.

[Egill]

Okay thanks for the replies Kleinstein and Mike, with those in mind I think I will take my chances and if something fishy starts happening, I'll replace the 10µF capacitor on the output  with a 4.7µF one. I do plan to use ceramic capacitors so hopefully they'll have a slightly lower capacitance rather than higher.

[Bud]

With ceramic capacitors you can run into other issue which is ESR. Same as limitations on lower/upper capacitance limitations you should check voltage regulators datasheets on tlimitations on ESR.  Ceramic capacitors have very low ESR and some voltage regulators do not like that. Make checking the datasheet for ESR and minimum capacitor values a rule, and your life will be easier.

[magic]

There is unfortunately no detailed information in this datasheet, but the usual requirements are that ESR must be in a particular range (e.g. 0.3Ω~22Ω for National LM1117) and capacitance must be no less than some minimum limit, which is calculated to have negligible capacitive reactance at some frequencies that the regulator cares about.

One case where too much is too much could occur when many capacitors are paralleled close to the regulator's output, bringing ESR below the lower limit.

[Kleinstein]

There are not much details in the datasheet, but at least they use 4.7 µF ceramic as there suggested value. So the regulator should be OK with low ESR. It can still be good to also have some capacitance with loss or some load parts (e.g. a 5 Ohms series resistor to isolate the supply to some chips) that act as damping. Even the LM1117, that needs some ESR is OK with some 10 µF ceramic, if there is another parallel capacitor with enough loss (e.g. 22 µF tantalum).

[Siwastaja]

Datasheet promises it's stable with 4.7uF MLCC, so it's not utter outdated crap like 1117. Does not need significant ESR to operate. 4.7uF MLCC is nearly zero ESR, 10uF is the same. But higher capacitance can still cause problems.

Very likely it's stable with 10uF MLCC, as well, but lacking stability curves, you don't know for sure.

Is your "already in design" 10uF capacitor an MLCC or something else? Do you really need that large value? If it's MLCC, larger package makes cracking more probable. You could just use 4.7uF in your design and if you really need 10uF somewhere, use two of these in parallel.

On input side, you can't have too much capacitance, or too low ESR, but very low ESR MLCCs on the input require damping against input voltage transients (hot-plugging). A cheap good old electrolytic cap at least 3-4 times the capacitance of the MLCC, in parallel, is the simplest way to deal with it; for example, a 10uF MLCC + 47uF elcap.

[magic]

True, the 1117 was given as an example of one where the limits are clearly spelled out.

There are various degrees of "near zero" and I wouldn't rule out the possibility of making some "ceramic stable" LDOs oscillate with enough MLCCs in parallel soldered right at the output pin.

What are example of regulators with maximum output capacitance specifications? I don't recall seeing one like that.

[Egill]

Thank you all for your thoughts on this, it's great to receive advice from all you experienced players.

Is your "already in design" 10uF capacitor an MLCC or something else? Do you really need that large value? If it's MLCC, larger package makes cracking more probable. You could just use 4.7uF in your design and if you really need 10uF somewhere, use two of these in parallel.

The board includes a switching step up regulator for stepping a single alkaline cell up to 3.3V. The regulator in question is the MCP1642B-33I:

https://ww1.microchip.com/downloads/en/DeviceDoc/20005253A.pdf

The datasheet of it details that one should use a 4.7µF or 10µF, X5R or X7R ceramic capacitor at the input and one or more 10µF, X5R or X7R capacitors at the output. I decided to put one 10µF X5R capacitor (size 0805) at the input and two at the output. Those 10µF capacitors are the ones I am thinking about using also with the LDO.

I guess I could use a couple of 4.7µF capacitors in parallel for the MCP1642B-33I instead but I feel like the components of the switching regulator are more critical than the ones of the LDO so that's why I wanted to use the 10µF capacitors for that as well. Another thought I had is that I could place two 10µF capacitors in series to get 5µF, although I don't think I've ever seen that done in practice. At least that is what I learned in school but maybe it's different in practice.

[Kleinstein]

2 MLCC is sometimes used to reduce the change for a short. It is still no a common solution because of the costs.  Sveral 4.7 µF in parallel is still possibly also with the switched mode converter.  Otherwise take the small risk with the 10 µF at the LDO.

[Siwastaja]

Note that under 3.3V DC bias, 10uF in 0805 and 4.7uF in 0805 will have nearly the same capacitance. Of course look for product-specific curves instead of assumptions, but the "10uF" might be 3uF and "4.7uF" might be 2.5uF.