Log Amplifiers

[multiplier]

Hi, I need a help with a design project. I have to implement a four-quadrant analog multiplier. The inputs can vary between -3 and +3 V with a max frequency of 10 kHz. I am using log/antilog amplifiers for this purpose. Since they don't work for negative inputs, I have to give a rectified input and compensate for this at the end. For this, I am using a precision rectifier at the input stage. To compensate for this, I am feeding the inputs to a comparator. The comparators are connected to an XOR gate. The output of this XOR gate is given as select line to an analog multiplexer. The inputs are the inverted and non-inverted outputs from the log-sum/antilog stage.

The issue over here is that, 1n4001 does not work for 10 kHz. I thought of using fast-switching diodes, 1n914 and 1n4148. They work fine for precision rectifiers but not for the log/antilog. I tried simulating this circuit(1n4148 for rectifiers and 1n4001 for log/antilog) and at 10 kHz, found out that I am getting an output but with slight deviations. The circuit works perfectly fine. But I am not able to understand as to how 1n4001 works for log/antilog but not precision rectifiers while the 1n4148 works for precision rectifiers but not log/antilog. Can anyone explain what is happening or can someone suggest a diode which works for both the applications?

Please don't suggest alternatives like PWM, Triangle Wave multiplication and Gilbert Cell. I am just an undergrad and those circuits are beyond me!

[lewis]

The datasheet for the AD633 may provide some insights: http://www.analog.com/static/imported-files/data_sheets/AD633.pdf

Try using the transdiode configuration for the log amp - http://en.wikipedia.org/wiki/Log_amplifier. Or, try using a diode-connected transistor for the diode (base and collector shorted: diode anode is B-C short, diode cathode is emitter, assuming NPN transistor)

[jimmc]

In order to operate at 10kHz I would guess that you are operating the logging diode at relatively currents (mA rather than nA).
This means that the bulk resistance of the silicon in series with the junction can start to cause deviation from a true logarithmic relationship between voltage and current.
The 1N4001, being a large area device, will have the lower bulk resistance.

For the precision rectifier low junction capacity and fast recovery time is required.
The 1N4148, being a small area device, works better here.
A small Schottky diode (eg 1N5711) would be even better - lower forward voltage and no stored charge.

As Lewis has mentioned, the transdiode configuration is better for logging, the applications section of this old datasheet may help. http://www.analog.com/static/imported-files/data_sheets/MAT02.pdf

Jim

[JackOfVA]

Or, of course, one could use an Analog Devices 4-quadrant analog multiplier chips. AD633 for example.

http://www.analog.com/en/special-linear-functions/analog-multipliersdividers/ad633/products/product.html

It does not get much simpler than that.

Multiplying by adding logs and then taking the anti-log is certainly the long way around to multiply two voltages. I would also carefully compute the error budget with the log/anti-log approach and see what the resulting accuracy is compared with something like the AD633. Both the log and anti-log process have error problems that require analysis. Don't forget to include the effect of noise in your analysis if the input signals are not perfectly conditioned.

[GK]

The transdiode circuit (such as described in that MATXX datasheet) is next to useless for dynamic signals of significant dynamic range that are not extremely sloooowwwwww.

The problem is the several hundred pF of compensation capacitance required for stability. Suppose the max input current of the design is 3mA. If the input suddenly swings down two decades (down to 30uA) the op-amp will saturate against the rail and stay there until that 30uA has sufficent time to slew the ~300-1000pF compensation capacitor the voltage change in Vbe.

This results in many mS of against-the-rail output saturation in response to any negative-going input current step of significant amplitude. Don't be missled by comp cap Vs bandwidth charts in datsheets for devices such as the LOG10X series of chips. These charts only represent small signal bandwidth (ie to input signals with very little dynamic range).

From memory the LOG102 chip gave me ~5mS of rail sticking with a correctly chosen 47pF of compensation capacitance for an abrupt negative input step of only 2 decades.