Over-voltage protection for inverting amplifier

[pjhenley]

Is this a legit approach to over-voltage protection? The purpose of this circuit is to take a voltage in the -20V to 20V range and fit it inside of 0V to 5V for output to an ADC. I am familiar with the idea of using diodes to clamp the voltage to the positive or negative rails, but it seemed to me that with an inverting amplifier there is no need to let the voltage deviate that far! Holding the voltage within a diode drop of the usual summing point would seem to provide some headroom that can only be beneficial.

I have put this circuit together and it seems to work just fine, but I have some concerns that I can't easily test. For example, would the transistors be too slow in the event of a sudden high-voltage transient? Is there concern for oscillation with the transistors and op amp feeding back to each other? The use of BJTs causes the voltage on the non-inverting input to be pulled up or down when they are conducting, but it seems to pull them in a direction that is beneficial to regulating voltage on the inverting input. Still, would it be better for any reason to use FETs?

[Zero999]

It should not be necessary as the MCP602 already has protection diodes.

If the inversion isn't required and the bandwidth is low, get rid of the op-amp and perform the function passively, using only resistors.



Note the above are ideal component values.

For E24, use:
R1 = 82k
R2 = 110k
R3 = 330k

For E96 use:
R1 = 25k5
R2 = 34k
R3 = 102k

Of course it's fine to multiply or divide by 10.

If this is driving an ADC directly, add a 1nF capacitor between the output and 0V, but this will reduce the bandwidth.

[pjhenley]

I think you may be right that the MCP602 is robust enough to handle over-voltages all by itself given a 1Mohm resistor in front of it. I see the discussion of that now in the datasheet, although my search terms didn't turn it up before.

I wouldn't want to get rid of the op-amp and go passive, though, for a few reasons. First, the sample-and-hold ADC doesn't want an impedance that big in front of it and I'd kind of like to keep it. Second, the ESD protection on the ADC is much less robust than the MCP602's, especially if we are reducing the input impedance. Lastly, using the op-amp gives me an opportunity to filter the signal between the op-amp and the ADC. Also, it is pretty trivial to implement range switching by switching in a different feedback resistor value.

The inverting bit doesn't bother me because you just fix it in firmware.

Even if it's academic, however, is this a protection scheme that is in use?

[spec]

Hi  pjhenley,

It's a clever circuit and it would definitely protect the inverting input of the opamp.

But there is a downside- you would be injecting leakage currents and noise into the most sensitive and sacrosanct point on the circuit- sorry.

There are other problems too, but not necessary to explore those.

[Zero999]

Hi  pjhenley,

It's a clever circuit and it would definitely protect the inverting input of the opamp.

But there is a downside- you would be injecting leakage currents and noise into the most sensitive and sacrosanct point on the circuit- sorry.

There are other problems too, but not necessary to explore those.

What are the other problems?

I can't see any issues with that circuit. Both of the transistors will be off during normal operation and their leakage currents will be tiny. Assuming a 10-bit DAC, 1 count is 5/1024 = 4.883mV, so with a 100k resistor, the leakage current would have to exceed 48.83nA to cause a count of error and the transistors will leak much less than that.

I think you may be right that the MCP602 is robust enough to handle over-voltages all by itself given a 1Mohm resistor in front of it. I see the discussion of that now in the datasheet, although my search terms didn't turn it up before.

I wouldn't want to get rid of the op-amp and go passive, though, for a few reasons. First, the sample-and-hold ADC doesn't want an impedance that big in front of it and I'd kind of like to keep it. Second, the ESD protection on the ADC is much less robust than the MCP602's, especially if we are reducing the input impedance. Lastly, using the op-amp gives me an opportunity to filter the signal between the op-amp and the ADC. Also, it is pretty trivial to implement range switching by switching in a different feedback resistor value.

The inverting bit doesn't bother me because you just fix it in firmware.

Even if it's academic, however, is this a protection scheme that is in use?

What sort of overvoltages are you expecting?

For future reference, an ADC only requires a low impedance to transfer charge to the sample and hold capacitor. The problem is, if the DC impedance is high, the voltage will sag/rise, when a sample is taken, as the sample and hold capacitor transfers charge to or from the source, depending on the voltage. Adding a capacitor between the ADC's input and 0V will act as a reservoir and smooth out and voltage changes due to the transfer of charge in the sample and hold capacitor i.e. give the source a low AC impedance. I should have drawn a 1nF to 10nF capacitor on my schematic but forgot.

See the links below for more information.
https://www.embeddedrelated.com/showarticle/110.php
https://www.st.com/content/ccc/resource/technical/document/application_note/9d/56/66/74/4e/97/48/93/CD00004444.pdf/files/CD00004444.pdf/jcr:content/translations/en.CD00004444.pdf
http://www.ti.com/lit/an/spna088/spna088.pdf

I've never seen this protection scheme used before but it seems perfectly sensible to me.

[iMo]

The purpose of this circuit is to take a voltage in the -20V to 20V range and fit it inside of 0V to 5V for output to an ADC.

In case you need full 0-5V output range you must use larger Vcc for the opamp - there is not such an opamp which can do full 0..Vcc output (maybe towards zero, but not Vcc). Also with -20V the inv input will go below gnd (Vss of the opamp)  - that may not work well as well.
PS: MCP6401 used in the below simulation.

[spec]

there is not such an opamp which can do full 0..Vcc output (maybe towards zero, but not Vcc).
PS: MCP6401 used in the below simulation.

Are you sure about this? Take a look at the TSX711 for example
https://www.st.com/en/amplifiers-and-comparators/tsx711.html

[spec]

Hi  pjhenley,

It's a clever circuit and it would definitely protect the inverting input of the opamp.

But there is a downside- you would be injecting leakage currents and noise into the most sensitive and sacrosanct point on the circuit- sorry.

There are other problems too, but not necessary to explore those.

What are the other problems?

I can't see any issues with that circuit. Both of the transistors will be off during normal operation and their leakage currents will be tiny. Assuming a 10-bit DAC, 1 count is 5/1024 = 4.883mV, so with a 100k resistor, the leakage current would have to exceed 48.83nA to cause a count of error and the transistors will leak much less than that.

I think you may be right that the MCP602 is robust enough to handle over-voltages all by itself given a 1Mohm resistor in front of it. I see the discussion of that now in the datasheet, although my search terms didn't turn it up before.

I wouldn't want to get rid of the op-amp and go passive, though, for a few reasons. First, the sample-and-hold ADC doesn't want an impedance that big in front of it and I'd kind of like to keep it. Second, the ESD protection on the ADC is much less robust than the MCP602's, especially if we are reducing the input impedance. Lastly, using the op-amp gives me an opportunity to filter the signal between the op-amp and the ADC. Also, it is pretty trivial to implement range switching by switching in a different feedback resistor value.

The inverting bit doesn't bother me because you just fix it in firmware.

Even if it's academic, however, is this a protection scheme that is in use?

What sort of overvoltages are you expecting?

For future reference, an ADC only requires a low impedance to transfer charge to the sample and hold capacitor. The problem is, if the DC impedance is high, the voltage will sag/rise, when a sample is taken, as the sample and hold capacitor transfers charge to or from the source, depending on the voltage. Adding a capacitor between the ADC's input and 0V will act as a reservoir and smooth out and voltage changes due to the transfer of charge in the sample and hold capacitor i.e. give the source a low AC impedance. I should have drawn a 1nF to 10nF capacitor on my schematic but forgot.

See the links below for more information.
https://www.embeddedrelated.com/showarticle/110.php
https://www.st.com/content/ccc/resource/technical/document/application_note/9d/56/66/74/4e/97/48/93/CD00004444.pdf/files/CD00004444.pdf/jcr:content/translations/en.CD00004444.pdf
http://www.ti.com/lit/an/spna088/spna088.pdf

I've never seen this protection scheme used before but it seems perfectly sensible to me.

Both of the inputs to an opamp are very sensitive to any kind of disturbance. There is the unnecessary leakage current which you seem to dismiss, but there could possibly be distortion introduced by the non linear characteristics of the emitter base junctions, but most importantly you would be introducing unnecessary inductance and capacitance. I would also suggest that it is bad practice.

[Zero999]

there is not such an opamp which can do full 0..Vcc output (maybe towards zero, but not Vcc).
PS: MCP6401 used in the below simulation.

Are you sure about this? Take a look at the TSX711 for example
https://www.st.com/en/amplifiers-and-comparators/tsx711.html

He's right. No op-amp's output can fully reach either of its supply rails. The example you've provided can get close, but it's still nearly 30mV out on the high side and just over 20mV out on the low side, when sourcing or sinking 1mA respectively. Refer to the table at the bottom of page 5 and top of page 6 of the data sheet. Whether this is an issue or not depends on what errors are acceptable.

Hi  pjhenley,

It's a clever circuit and it would definitely protect the inverting input of the opamp.

But there is a downside- you would be injecting leakage currents and noise into the most sensitive and sacrosanct point on the circuit- sorry.

There are other problems too, but not necessary to explore those.

What are the other problems?

I can't see any issues with that circuit. Both of the transistors will be off during normal operation and their leakage currents will be tiny. Assuming a 10-bit DAC, 1 count is 5/1024 = 4.883mV, so with a 100k resistor, the leakage current would have to exceed 48.83nA to cause a count of error and the transistors will leak much less than that.

I think you may be right that the MCP602 is robust enough to handle over-voltages all by itself given a 1Mohm resistor in front of it. I see the discussion of that now in the datasheet, although my search terms didn't turn it up before.

I wouldn't want to get rid of the op-amp and go passive, though, for a few reasons. First, the sample-and-hold ADC doesn't want an impedance that big in front of it and I'd kind of like to keep it. Second, the ESD protection on the ADC is much less robust than the MCP602's, especially if we are reducing the input impedance. Lastly, using the op-amp gives me an opportunity to filter the signal between the op-amp and the ADC. Also, it is pretty trivial to implement range switching by switching in a different feedback resistor value.

The inverting bit doesn't bother me because you just fix it in firmware.

Even if it's academic, however, is this a protection scheme that is in use?

What sort of overvoltages are you expecting?

For future reference, an ADC only requires a low impedance to transfer charge to the sample and hold capacitor. The problem is, if the DC impedance is high, the voltage will sag/rise, when a sample is taken, as the sample and hold capacitor transfers charge to or from the source, depending on the voltage. Adding a capacitor between the ADC's input and 0V will act as a reservoir and smooth out and voltage changes due to the transfer of charge in the sample and hold capacitor i.e. give the source a low AC impedance. I should have drawn a 1nF to 10nF capacitor on my schematic but forgot.

See the links below for more information.
https://www.embeddedrelated.com/showarticle/110.php
https://www.st.com/content/ccc/resource/technical/document/application_note/9d/56/66/74/4e/97/48/93/CD00004444.pdf/files/CD00004444.pdf/jcr:content/translations/en.CD00004444.pdf
http://www.ti.com/lit/an/spna088/spna088.pdf

I've never seen this protection scheme used before but it seems perfectly sensible to me.

Both of the inputs to an opamp are very sensitive to any kind of disturbance. There is the unnecessary leakage current which you seem to dismiss, but there could possibly be distortion introduced by the non linear characteristics of the emitter base junctions, but most importantly you would be introducing unnecessary inductance and capacitance. I would also suggest that it is bad practice.

The summing node is not as sensitive as you believe because it has a very low impedance. The op-amp's output voltage will change to keep both of its inputs the same, as long as the loop is closed. The value of the feedback resistor affects how sensitive the inverting input is to stray currents flowing through Q1 and Q3. I dismissed the leakage current because it's negligible, as my calculations show. The worst case cut-off current for the 2N3904 and 2N3906 is 50nA, but that's specified with a V_CE of 30V and in this circuit V_CE = 2.5V, so it will be a tiny fraction of that. Perhaps if he's using a 16-bit DAC it might become an issue, but the op-amp's saturation voltage would start to be problematic before then.

https://www.onsemi.com/pub/Collateral/2N3903-D.PDF
https://www.sparkfun.com/datasheets/Components/2N3906.pdf

The non-linear characteristics of the base-emitter junctions is a non-issue because there's under 1µV across them and the additional capacitance and inductance is negligible at the frequencies the MCP602 cares about.

[iMo]

there is not such an opamp which can do full 0..Vcc output (maybe towards zero, but not Vcc).
PS: MCP6401 used in the below simulation.

Are you sure about this? Take a look at the TSX711 for example
https://www.st.com/en/amplifiers-and-comparators/tsx711.html

The datasheet says a lot of mVolts are needed to reach the full Vcc or Vss at its output..

[spec]

there is not such an opamp which can do full 0..Vcc output (maybe towards zero, but not Vcc).
PS: MCP6401 used in the below simulation.

Are you sure about this? Take a look at the TSX711 for example
https://www.st.com/en/amplifiers-and-comparators/tsx711.html

He's right. No op-amp's output can fully reach either of its supply rails. The example you've provided can get close, but it's still nearly 30mV out on the high side and just over 20mV out on the low side, when sourcing or sinking 1mA respectively. Refer to the table at the bottom of page 5 and top of page 6 of the data sheet. Whether this is an issue or not depends on what errors are acceptable.

Hi  pjhenley,

It's a clever circuit and it would definitely protect the inverting input of the opamp.

But there is a downside- you would be injecting leakage currents and noise into the most sensitive and sacrosanct point on the circuit- sorry.

There are other problems too, but not necessary to explore those.

What are the other problems?

I can't see any issues with that circuit. Both of the transistors will be off during normal operation and their leakage currents will be tiny. Assuming a 10-bit DAC, 1 count is 5/1024 = 4.883mV, so with a 100k resistor, the leakage current would have to exceed 48.83nA to cause a count of error and the transistors will leak much less than that.

I think you may be right that the MCP602 is robust enough to handle over-voltages all by itself given a 1Mohm resistor in front of it. I see the discussion of that now in the datasheet, although my search terms didn't turn it up before.

I wouldn't want to get rid of the op-amp and go passive, though, for a few reasons. First, the sample-and-hold ADC doesn't want an impedance that big in front of it and I'd kind of like to keep it. Second, the ESD protection on the ADC is much less robust than the MCP602's, especially if we are reducing the input impedance. Lastly, using the op-amp gives me an opportunity to filter the signal between the op-amp and the ADC. Also, it is pretty trivial to implement range switching by switching in a different feedback resistor value.

The inverting bit doesn't bother me because you just fix it in firmware.

Even if it's academic, however, is this a protection scheme that is in use?

What sort of overvoltages are you expecting?

For future reference, an ADC only requires a low impedance to transfer charge to the sample and hold capacitor. The problem is, if the DC impedance is high, the voltage will sag/rise, when a sample is taken, as the sample and hold capacitor transfers charge to or from the source, depending on the voltage. Adding a capacitor between the ADC's input and 0V will act as a reservoir and smooth out and voltage changes due to the transfer of charge in the sample and hold capacitor i.e. give the source a low AC impedance. I should have drawn a 1nF to 10nF capacitor on my schematic but forgot.

See the links below for more information.
https://www.embeddedrelated.com/showarticle/110.php
https://www.st.com/content/ccc/resource/technical/document/application_note/9d/56/66/74/4e/97/48/93/CD00004444.pdf/files/CD00004444.pdf/jcr:content/translations/en.CD00004444.pdf
http://www.ti.com/lit/an/spna088/spna088.pdf

I've never seen this protection scheme used before but it seems perfectly sensible to me.

Both of the inputs to an opamp are very sensitive to any kind of disturbance. There is the unnecessary leakage current which you seem to dismiss, but there could possibly be distortion introduced by the non linear characteristics of the emitter base junctions, but most importantly you would be introducing unnecessary inductance and capacitance. I would also suggest that it is bad practice.

The summing node is not as sensitive as you believe because it has a very low impedance. The op-amp's output voltage will change to keep both of its inputs the same, as long as the loop is closed. The value of the feedback resistor affects how sensitive the inverting input is to stray currents flowing through Q1 and Q3. I dismissed the leakage current because it's negligible, as my calculations show. The worst case cut-off current for the 2N3904 and 2N3906 is 50nA, but that's specified with a V_CE of 30V and in this circuit V_CE = 2.5V, so it will be a tiny fraction of that. Perhaps if he's using a 16-bit DAC it might become an issue, but the op-amp's saturation voltage would start to be problematic before then.

https://www.onsemi.com/pub/Collateral/2N3903-D.PDF
https://www.sparkfun.com/datasheets/Components/2N3906.pdf

The non-linear characteristics of the base-emitter junctions is a non-issue because there's under 1µV across them and the additional capacitance and inductance is negligible at the frequencies the MCP602 cares about.

I give up

[nsrmagazin]

The standard circuit used is the one in post 2. But without the large value resistor in the middle, just 1k and 9.1k.

[Zero999]

I give up

You'll never learn anything if you give up.

The standard circuit used is the one in post 2. But without the large value resistor in the middle, just 1k and 9.1k.

Which circuit are you referring to? Mine?

A simple potential divider will make the output voltage dependant on the source resistance. It will work if the source resistance is constant, known and can be factored into the calculation.

[coppercone2]

keep in mind internal protection diodes are small. you can do better with consequences.

[rstofer]

There's a very methodical procedure for fitting an input range into an output range including offset using op amps.  It does not, however, protect for voltages outside the input range specified.

http://www.ti.com/lit/an/sloa097/sloa097.pdf

A couple of days ago I was working on this for another thread so I'll just repost the MATLAB script.  This is specific to the case where both 'm' and 'b' are positive as discussed in the paper.

You could specify the output range to avoid getting close to the rails.  Maybe leave 0.1V either side when using a rail-to-rail op amp.

Unfortunately, I can't post a filetype of .m so I had to post it as .txt  The only reason I wrote this was to document the process.  The calculations are easy on a calculator.

[iMo]

And the calculator:
http://earmark.net/gesr/opamp/

[rstofer]

And the calculator:
http://earmark.net/gesr/opamp/

Thanks for the link.  I went looking for a calculator, TI even mentions one, but I couldn't find it.  I have bookmarked the page, it is that helpful!

[Zero999]

There's a very methodical procedure for fitting an input range into an output range including offset using op amps.  It does not, however, protect for voltages outside the input range specified.

http://www.ti.com/lit/an/sloa097/sloa097.pdf

A couple of days ago I was working on this for another thread so I'll just repost the MATLAB script.  This is specific to the case where both 'm' and 'b' are positive as discussed in the paper.

You could specify the output range to avoid getting close to the rails.  Maybe leave 0.1V either side when using a rail-to-rail op amp.

Unfortunately, I can't post a filetype of .m so I had to post it as .txt  The only reason I wrote this was to document the process.  The calculations are easy on a calculator.

That doesn't work when m < 1 and the TI app note also fails when m > 0 & <1. It generates negative resistance values.
The minimum gain of a non-inverting op-amp is 1, so it can't work. When m < 1 & >0, either use an inverting amplifier, then invert again or a potential divider, like the one I posted and add a unity gain buffer to it, if necessary.

And the calculator:
http://earmark.net/gesr/opamp/

I've seen that before and was looking for it yesterday, but my Google skills were letting me down.

It's good, but doesn't show the exact values, only the nearest standard resistor values, which aren't even optimised as you have to manually select R1,  which might not always be what you want.

[iMo]

It's good, but doesn't show the exact values, only the nearest standard resistor values, which aren't even optimised as you have to manually select R1,  which might not always be what you want.

At the end of the day people simply take resistors from their junkboxes and calibrate the ADC output in software..

[David Hess]

Yes, it will work fine and transistors operating as transistors are often used in place of diode clamps for lower output impedance.  Even more commonly, a transistor is used to provide a low impedance point to *drive* a low leakage diode clamp because the Vce transistor connection has additional leakage.  Internally, precision bipolar operational amplifiers usually have sets of anti-parallel diodes across their inputs which do the same thing and especially prevent damaging base-emitter breakdown of the input transistors. 

Watch out for the added capacitance from the transistors or diode clamps at the inverting input which lowers the phase margin of the operational amplifier.  A small amount of capacitance across the feedback resistor will cancel the shunt capacitance and increase phase margin if this is a problem.

[nsrmagazin]

This is the most used circuit for MCU ADCs.

[Zero999]

Yes, it will work fine and transistors operating as transistors are often used in place of diode clamps for lower output impedance.  Even more commonly, a transistor is used to provide a low impedance point to *drive* a low leakage diode clamp because the Vce transistor connection has additional leakage.  Internally, precision bipolar operational amplifiers usually have sets of anti-parallel diodes across their inputs which do the same thing and especially prevent damaging base-emitter breakdown of the input transistors. 

Watch out for the added capacitance from the transistors or diode clamps at the inverting input which lowers the phase margin of the operational amplifier.  A small amount of capacitance across the feedback resistor will cancel the shunt capacitance and increase phase margin if this is a problem.

Thanks for providing an explanation as to why the parasitic capacitance of the diodes and transistors can be a problem and what can be done about it.

[JPortici]

It should not be necessary as the MCP602 already has protection diodes.

Actually, there are diodes only between VSS and the input. the protection over the positive rail needs to be external.
http://ww1.microchip.com/downloads/en/devicedoc/21314g.pdf (section 4.1  this is common to many RR opamps from microchip)

[Zero999]

It should not be necessary as the MCP602 already has protection diodes.

Actually, there are diodes only between VSS and the input. the protection over the positive rail needs to be external.
http://ww1.microchip.com/downloads/en/devicedoc/21314g.pdf (section 4.1  this is common to many RR opamps from microchip)

I didn't know that. I wonder why?

A good thing about this inverting configuration is it can already deal with a significant overvoltage already. R2 and R6 form a potential divider with an attenuation factor of 11, so if the output saturates at 0V, then the input voltage will have to go up to 55V, before the inverting input voltage will rise above +5V.