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| Isolating an open-drain output to allow higher voltage pull-up |
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| eddie1:
I have an open-drain output off a PIC. The output will be connected to an external device, which could potentially pull it up to as much as 12V, but more likely 3.3V. This particular PIC part (PIC16LF18324) has an absolute max voltage rating of VDD+0.3V, and I intend to run the PIC at 1.8V, so either 3.3V or 12V will exceed the rating. I need to find a way to isolate the output in a way that will allow it to be pulled up beyond the PIC's limits. The idea I came up with is to change the MCU output to push-pull and connect an N-channel logic-level MOSFET (rated to handle the pull-up voltage) between the MCU pin and the external device. The gate would be connected to the MCU pin, the drain would be connected to the external device, and the source would be connected to ground. I think the result would be that when the MCU pin is logic high, the drain (connected to the external device) would be pulled to ground, and when the MCU pin is logic low, the drain would be floating (and pulled up by the external device). The PIC output is already at 50% duty cycle, so the output inversion isn't an issue (and if it was, the PIC output could be inverted anyway). This sounds to my inexperienced self like it should work, but I wanted to see if there is a more proper way to accomplish this. Thanks! |
| Ian.M:
Yes, that idea works and is probably the cleanest way to handle it. You'll need a N-MOSFET with a gate threshold voltage under 1V to ensure your 1.8V logic '1' level is enough drive to turn it fully on. If there's any chance of an inductive load, even just the inductance of long wires, you may want to add a 25V Zener across the MOSFET, cathode to drain (and use a MOSFET rated for at least 30V Vds) to clamp any back-EMF at switch-off. |
| EEEnthusiast:
Make sure you add a pull-down resistor of about 100K at the gate of the NMOS. This is to ensure that the gate does not float upon power up, before the MCU programs those pins as outputs and start to drive them. This is a good design practice in addition to the diode as stated above. |
| Ian.M:
The need for a pull-down resistor depends on the load. Its essential for all power MOSFETs and high current loads as leakage current into a floating gate could take the MOSFET into its linear region and burn it up fairly rapidly. However if the MOSFET is only used for logic level shifting and the load cant pass enough current to cause significant dissipation in the MOSFET even worst case with half the load supply voltage across it, and the load can tolerate an invalid logic level during startup, you may be able to get away without a gate pull-down. |
| eddie1:
Thank you both! MOSFET shopping is a bit of a pain. Digi-Key's normally excellent parametric search can only go so far when different manufacturers use different conditions for their ratings (e.g. some Vgs(th) are at 250uA, some at 1mA, and everywhere in between). Is my understanding here correct: obviously a low enough Vgs(th) at the appropriate current level, high enough Vdss, and high enough continuous current rating (which need not be that high, just enough for a typical external pull-up) are must-haves; but beyond that, lower gate charge and lower input capacitance are better for lowering power consumption and making it easier to drive with an MCU, but not terribly important in this application (not worth paying significantly more for)? The absolute max switching speed for this open drain signal would probably be about 2000 Hz (likely lower, but being conservative here). And thank you for the ideas of the Zener and pull-down resistor. The Zener sounds like a good idea because long wires are a possibility (6" is probably typical, but potentially 12" or longer could be connected). I'm not sure if the pull-down resistor is necessary though -- junk output during the few-millisecond startup period shouldn't be an issue, and (correct me if I'm wrong) I don't think this is particularly high current. I figure even in an absolute worst case where an external device uses a very low 1k pull-up (which seems unlikely in itself) and pulls up to 12V (which also seems unlikely; it's allowed but I can't imagine the utility of pulling up beyond a 3.3V or 5V logic level), that's 12mA, but the output is floating 50% of the time, so it's really 6mA. Actually, that raises another question: what's the best way of protecting against a scenario where the OD output is directly connected to a positive voltage without a resistor (whether by some kind of hardware failure or just error), which would create a short circuit during the 50% of the time when the OD output is grounded? Would a low-value resistor (maybe 2.2k) between the drain and the external connection work, or is there a better way? (Sorry for the dumb questions. This is my first project actually playing with electronics at a hardware level, beyond, say, simply assembling a PC. I think I've figured out some of the basics, but I know there's a lot I don't know and I'm not even particularly confident in my ability with the basics!) |
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