JFET as replacement for analog switch like DG444 and question about RDS(on)flat

[mfratus2001]

The current domain is hard to maintain with accuracy, since all analog switches are going to be variable.
Instead, why don't you operate in the voltage domain for your selectors, and use a voltage-to-current conversion? That way the on-resistance is a minor factor.
I just can't see switching a 1-Ohm resistance in with any analog switch (even a big MOSFET) and having repeatability. Otherwise, use relays.

[julian1]

The current domain is hard to maintain with accuracy, since all analog switches are going to be variable.
Instead, why don't you operate in the voltage domain for your selectors, and use a voltage-to-current conversion? That way the on-resistance is a minor factor.

A trans-impedance amplifier as Kleinstein mentioned? I had to wikipedia it - but was thinking about whether it would be possible to use a jfet input op-amp with an output diode (ideal rectifier) and shunt-valued resistor feedback (tia), and then use the non-inverting input (0V or -10V) to control which tia op-amp was active. But I'm not sure it can be done without some additional switching complexity.

I just can't see switching a 1-Ohm resistance in with any analog switch (even a big MOSFET) and having repeatability. Otherwise, use relays.

Agreed.

And once there's one relay in the path - then iterating ranges will always be slowed down by the mechanical action of the relay. I'm still thinking it may be simplest (and economically equivalent to analog-switches) to just use relays for all ranges up to 10uA. 10uA being the minimal permissible current to ensure good relay contact connection according to the datasheets for Omron signal-relays.

[Kleinstein]

The trans-impedance amplifier is attractive for low to very low currents. It gets more difficult for more than about 1 mA, as the OP has to drive the measured current and at a higher voltage drop self heating of the resistor might get a problem. The advantage is that in an TIA the drop on the resistor can be higher (like 1 V or even 10 V) this way offset errors of the OP are not that important and one can thus use low bias JFET of CMOS types. The main range to use an TIA is if you want to measure with better than pA resolution - so more like below 1 µA full scale.

For the large currents, the chain of shunts is the usual way, possibly using a fully separate shunt for very high currents. The usually higher bias current of low drift / offset OPs somewhat limits the use of the shunt scheme to very low currents. So ranges of less than about 10 µA might need a compromise on the OP.

I am a little confused with the resistor and current values used in the first circuit plan - usually the voltage at shunts is low - more like 20 mV - 400 mV. It is only in circuit more like an TIA that compensate for the drop, that a higher burden is more common. At high currents, self heating is strong argument for a low drop. What is the application ?

As the switch is not in the voltage reading path, the switches are not that critical with respect to on-resistance. So there is no big problem in also switching 10 A through MOSFETs (or JFETs if you are willing to spend the money) - it is leakage that might be a problem. So for leakage reasons a relay might be better here - still leakage of the protection circuit remains. As the switches are only for directing the current, they could even work for the very low currents below the 10 µA limit from the relay specs - we don't really care about a little higher drop that might occur at such low currents. However, FET switches are usually cheaper and lower power at such low currents.

[julian1]

 
I am a little confused with the resistor and current values used in the first circuit plan - usually the voltage at shunts is low - more like 20 mV - 400 mV. It is only in circuit more like an TIA that compensate for the drop, that a higher burden is more common. At high currents, self heating is strong argument for a low drop. What is the application ?

A current source. The resistors are part of the regulation loop, so burden voltage is not an issue. I was aiming for 1A max output - not 10A - but you're still correct about self-heating which I have somehow managed to overlook. The higher current ranges will need to use resistors with a lower voltage-drop and amplification rather than a buffer to align with other ranges.

for the very low currents below the 10 µA limit from the relay specs - we don't really care about a little higher drop that might occur at such low currents.

I've seen schematics for older current sources with a 1G sense resistor switched by a relay (10nA range) where the relay is part of the measurement- using what I think is a Coto relay part. But I can't find any relays that match that kind of minimum permissible current.

I suspect that if one can periodically (eg. on instrument startup) push a higher current through the contacts then that would be sufficient to clean them of any oxides/debris.

Alternatively perhaps any added resistance - from the low current being outside spec - is simply dwarfed by the size of the G-ohm range shunt resistor.

[Kleinstein]

For an active current source over-current protection is less of an issue and the possibly high drop is allowed if self heating is considered. It's also possible to have current in one direction only.  I am not sure about the very small currents - the power part might limit the useful range due to leakage too.

For operation with very low currents there were special mercury whetted relays, that work well and very reproducible, but are not available anymore for normal use. AFAIK a normal relay contact at very low current might give an extra voltage drop of a few µV. So it should not be a problem in the current path, but it might be a problem in the voltage path. Relays with gold contacts are already quite good - typical performance can also be much better than guaranteed.

For most of the ranges the series connection of the shunts should be fine. Otherwise one could use separate switching for the current (e.g. relay or MOSFET) and the voltage sensing (CMOS switch chip). It is much less trouble than having the switch resistance as part of the shunt, even if a cheap CD4052 or similar is used.

[julian1]

usually the voltage at shunts is low - more like 20 mV - 400 mV.

If we organize for the higher current ranges - to use lower voltage-drops to limit self-heating (eg 1V rather than 10V). Then that makes controlling the n FET gates much simpler. eg. Just drive it +10V above GND, rather than +10V above a S that might be +-10V wrt GND.

I think that removes my hesitation about gate control complexity. So the in-series shunt approach with the switch out of the measurement is an excellent fit for higher current ranges.

[Kleinstein]

For an 1 A current, the drop on the shunt should not be much higher than 200 mV. This already gives 200 mW and thus should use a resistor that is good for something like 2 W or more to limit the self heating. Even for the lower currents, one should get away with less than 1 V - one can still use the same amplifier.

With MOSFETs one can just apply something like +10 V to turn them on. With JFETs one might still need to take into account the approximate voltage levels, as here on is at 0 V and already +400 mV might give considerable leakage to gate. This makes JFETs less convenient in many applications.

For current in both directions one might need something like 2 MOSFETs in series (different direction) because of the substrate diodes. It usually still works just driving the gates.
For low currents a MOSFET with separate substrate or a CMOS switch might be a better choice.

[KubaSO]

The J111 specs suggest 30ohm with 0V VGS, and leakage is only 1nA when VGS is -10V. I have no experience with JFETs but understand they can be used bidirectionally.

J111..113 and 2N4391..4393 were designed specifically for use as analog switches. They are good enough to be used as switches in 4+ digit double-slope DMMs, as a point of reference.

My question is -  how RDS(on) of the JFET would be characterized if the D or S was varied over a range of say +10V to -10V?

It doesn't change at all, since these parts are meant to be turned on by setting the gate voltage to be the source voltage. So the RDS(on) is not absolute-voltage dependent. It varies slightly with the channel current, and around the saturation current the incremental channel resistance goes very high, i.e. you get a current source, not a resistor.

Say the source of the JFET is connected to the output of an op-amp. It is a low impedance-driven node. The other side - drain - is connected to a high impedance load, like say an integrator input.

To turn the switch on, a resistor - say 100kΩ - permanently connects gate to the low-impedance source.

To turn the switch off, a current sink is connected to the gate, using a bipolar transistor as a switch, for example. A current is sunk from the low impedance source-side driver, through the 100kΩ GS resistor, establishing a negative gate-source voltage, i.e. the gate is lower than the source.

Since the gate-channel capacitances are in single pF, the charge injection is minuscule.

As long as the source nodes are driven from a low-impedance source, the JFETs are excellent switches. In that particular application, they outperform low-end integrated MOS switches. Many early DMMs used JFETs as switches, with much success.

 hXn5D.png (9.63 kB. 600x373 - viewed 83 times.)

[the_cake_is_a_lie]

Douglas Self has pages devoted to switching with JFET and CMOS 4016 and 4066 gates in chapter 21 of Small Signal Audio Design. I think half a page is fair use.

The JFET types J111 and J112 are specially designed for analogue switching and pre-eminent
for this application. The channel on-resistances are low and relatively linear. This is a depletion mode
FET, which requires a negative gate voltage to actively turn it off. The J111 requires a more
negative V gs to ensure it is off, but in return gives a lower R_ds(on) which means lower distortion.

The J111, J112 (and J113) are members of the same family – in fact they are the device,
selected for gate/channel characteristics, unless I am much mistaken. Table 21.6 shows how
the J111 may need 10 V to turn it off, but gives a 30 Ω on-resistance or R ds(on) with zero gate
voltage. In contrast the J112 needs only 5.0 V at most to turn it off, but has a higher R ds(on) of
50 Ω. The trade-off is between ease of generating the gate control voltages, and linearity. The
higher the R_ds(on), the higher the distortion, as this is a non-linear resistance.

FET tolerances are notoriously wide, and nothing varies more than the V gs characteristic. It is
essential to take the full range into account when designing the control circuitry.

Both the J111 and J112 are widely used for audio switching. The J111 has the advantage of
the lowest distortion, but the J112 can be driven directly from 4000 series logic running from
±7.5 V rails, which is often convenient. The J113 appears to have no advantage to set against
its high R_ds(on) and is rarely used – I have never even seen one.

He shows example circuits next. No PCBs or circuit simulation links to download. I bought J111 and J112 but also J109 and P-channel J176 that he doesn't mention. Not sure why he doesn't mention J109. I'd appreciate it if anyone can answer if J109 isn't legit to use in switching given it has the lowest resistance.

I'm not smart enough to make tables. Maybe someone can make a pic but I'm going to act like it's 2000s GameFAQs:

N-Ch     V_gs(min), Vgs_(max), R_ds(on)Ω
J109:......-2...........-6..............12
J111:......-3...........-10............30
J112:......-1...........-5..............50
J113:......-0.5........-3..............100

P-Ch
J175:.......+3.........+6.............125
J176:.......+1.........+4.............250
J177:.......+0.8......+2.5...........300

The scam of JFETs, besides their price, is the V_gs spread being greater than MOSFETs.