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JFET frontend amplifier stability

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FaTiWo:
Inspired by The Arts of Electronics 3 and this post (https://www.eevblog.com/forum/beginners/jfet-front-end-amplifier-a-la-aoe3/msg3579870/#msg3579870) I started to play around in LTSpice with an JFET frontend amplifier.
I am not very familiar with analogue electronics, but such an approach seems to me to be suitable for both small (several 10 ohms) and large (several 10 kohms) signal source impedances due to the relatively low voltage noise as well as the low current noise of the JFETs (and of course also the large input impedance).
My intentions/goals for such an amplifier are:
- low noise (hence jfet frontend)
- as linear as possible (hence the feedback with the OpAmp)
- stable for resistive and iductive signal sources
- bandwidth of several 100 kHz (low input capacitance)

While running simulations in LTSpice, I found that the circuit seems stable, but with the wrong impedance at the input, it is not. This is especially true for inductive sources such as a measuring coil with a few hundred uH. If there is a nearly resistive source everything works fine. I did not expect this, as I have only worked with instrumentation amplifiers when amplifying a signal from a coil, and they always worked stably. So my first question would be, if there is any possibilty to make this circuit more stable?

While investigating this question, I randomly experimented with an RC element at the input, which can make the circuit much more stable. But that looks scary to me and I do not really trust it, especially with regard to a practical implementation. I think that the instability is due to the real part of the input impedance of the amplifier circuit, which no longer becomes negative with the RC element. I explain this as follows:
If the input resistance becomes negative in a certain frequency range and the resonance frequency of the LC element (consisting of the input inductance and the parasitic capacitance) falls into this range, the resonance is not damped as it would be with a positive resistance, but instead amplified uncontrollably. Is this right? Does such a problem come from the amplifier topology or is it a general problem of amplifiers?
Furthermore, it irritates me that according to my interpretation of the phase and amplitude of the feedback amplifier, the circuit with RC element should still be unstable. However, the transient analysis in LTSpice works perfectly. Any ideas why?
Another solution in relation to the negative real part of the input impedance would be to put a resistor in front of the gate, but that is an bad idea for low noise purposes.

The schematic and some graphs illustrating the problems discussed above can be found in the attached.
Thanks in advance!

TimFox:
When designing high-frequency feedback circuits for use with tuned circuits (ballpark 20 MHz), I found it useful to do .AC analysis (linearized) on the Spice model without source impedance, and "measure" the complex input admittance with a dummy voltage source connected to the input.  Often, one could find a region of frequencies where the real part (conductance) was negative, which could cause oscillation if the source conductance at that frequency were not sufficiently positive.
With an inductive source, watch out for the "Colpitts oscillator" (q.v.) circuit formed by the JFET input (gate-source) capacitance and the bypass capacitor across the source bias resistor.

FaTiWo:
All right, the AC analysis shows me a frequency range with negative conductance. Does this mean that the amplifier can only be used for sources with sufficient positive conductance? How do professionals solve something like this when they develop a product? Is it possible at all?

Does the problem occur especially in high-frequency feedback circuits or does the reduction of the bandwidth already provide a fix?

And did I understand correctly that there is a direct correlation between the "Colpits oscillator" and the negative conductance?

Kleinstein:
R15,R16 and C3 in the circuit shown are parts to deal with the input impedance. With suiteable values there one can avoid oscillation and make the input impedance well behaved again.

Limiting the BW of the amplifier can help a little, when done directly at the JFETs. Just the normal capacitor (c2) parallel to the feedback part usually does not help.  It sometimes helps to use JFETs / transistors that are not as fast. The LSK389 don't look very fast, more like made for the audio range and not RF. So things may get worse with faster parts.

imo:
In LTSpice you can do "stability analysis".

https://www.analog.com/en/technical-articles/ltspice-extracting-switch-mode-power-supply-loop-gain-in-simulation-and-why-you-usually-don-t-need.html

Below an example..

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