Author Topic: JK flip flop model help  (Read 1019 times)

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Offline 3roomlabTopic starter

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JK flip flop model help
« on: June 23, 2019, 07:31:31 am »
some play time with JK FF triggering
the -ve edge model looks fine
but the + ve model does not follow the pulse

I triggered J/K/R with binary 1 to start the "count". I am guessing there is no error there. so how do I make the +ve version count like the -ve version?

(these models are from the normal 74hc lib)
« Last Edit: June 23, 2019, 07:33:57 am by 3roomlab »
 

Offline 3roomlabTopic starter

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Re: JK flip flop model help
« Reply #1 on: June 24, 2019, 11:39:10 am »
anybody know the cure to work the +ve edge FF ?
 

Offline rstofer

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Re: JK flip flop model help
« Reply #2 on: June 24, 2019, 07:55:42 pm »
I see a lot of people have viewed your message and none seem to understand the problem.  Neither do I!

But I wonder about that ground on the Set input of the first flop in the second attachment image.  I'm not sure I understand what is happening there.

The way the attachments are laid out, it's not readily apparent that the .asc fill is also attached.  Not much to be done about that, I suppose.  Some folks might run an LTspice simulation, nobody is going to redraw a schematic.
 
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Offline 3roomlabTopic starter

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Re: JK flip flop model help
« Reply #3 on: June 25, 2019, 08:34:27 am »
well its just clock in 74HC107 @ node 005, 003 triggers the JKR. the output works
but clock in 74HC109, trigger JKR, it doesnt output the same way. the output only latches high.

the difference as far as I understand these are that 107 is a -ve edge and 109 is positive edge trigger
 


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