Electronics > Beginners
Learning FPGAs for Video Processing
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hamster_nz:

--- Quote from: xxninjabunnyxx on January 16, 2019, 02:52:56 am ---I understand the decoding and then recoding the HDMI signal, but what I can't seem to wrap my head around I what to do with the signal after it has been decoded and waiting to be recorded. How do I make sure the right line is being sent to the encoder at the right time?

--- End quote ---

In general, you don't. You just stream everything through the pipeline using the pixel clock. You ensure that the data and control paths have the same latency, and then you have nothing to do.

Advanced effects that alter geometry (e.g. zooming) may require a frame buffer in SDRAM, but then you count cycles from HSYNC and VSYNC, and use that to trigger when you replay the data form RAM.

I know it's VHDL, but see https://github.com/hamsternz/Artix-7-HDMI-processing/blob/master/src/audio_meters.vhd for how I overlaid audio level meters on the video stream.

It would pay to build a block-level design for your pipeline, and check that each stage only needs a handful of video lines to be held. These will end up in block RAM. Also count multiplications as multipliers may be a constraint.

Spending a a few days on your design before you start coding will help HEAPS!
LapTop006:
If you want to start with something more pre-baked you can look at the projects around the NeTV2 board, they can get you started on dealing with HDMI video.
Berni:
First step is to forget everything you know about C. The If Switch For..etc statements might look familiar but they work differently in HDL. It tends to be more useful to imagine what you are trying to do as a collection of D flip-flips and combinational logic between them to do the actual "computation".

In terms of video interfaces its best to stick to VGA. All other interfaces are more complicated but perfectly possible to do on a FPGA. To generate VGA all you need is  a R2R resistor DAC hanging off some FPGA pins to generate the analog red green blue signals and some resistor level shifting on Vsync and Hsync lines to tell the monitor where to draw. You will find lots of examples of how to build a VGA timing generator in HDL. Once you have a timing generator making your Hsync and Vsync you just bring out the line and row counter out of the generator and make a module that takes the X Y position as input and outputs the R G B values for that pixel. A common hello world for this is usually generating a "color barf" pattern by just feeding the X Y counters into the RGB values.

As for video input that's a bit more tough. You can't directly feed VGA into a FPGA because of it being analog. The best way to go about it is to use a chip that converts your format of choice to a parallel RGB bus. This is a very common bus used to move video around and its basically the same as VGA except that the R G B is in the form of a digital bus like for example 8bit Red 8bit Green 8bit Blue for a bus with 24bit colors, each clock cycle puts the values for 1 pixel on those lines. You can get chips that convert Composite, VGA, DVI, HDMI etc... into a RGB bus.
MavMitchell:
Another thought might to be to use a PC grade VGA to HDMI converter($10), decode the digital and output via VGA.
The benefit is a single known HDMI format.


https://www.ebay.com/itm/VGA-Male-To-HDMI-Output-1080P-HD-Audio-TV-AV-HDTV-Video-Cable-Converter-Adapter/142543986595?hash=item2130489fa3:m:mY9GzpcsC4ln4doOzYSKNgg&var=441533081724
BrianHG:
According to  xxninjabunnyxx's Reply #9 on: January 15, 2019, 09:52:56 pm, I think what he is trying to say is that he doesn't know what a video signal is or how it works.  Whether it's VGA, DVI, or HDMI, video has a vertical sync which reset's the vertical position to 0 and a horizontal sync which resets the horizontal position to 0.  At every clock on the data coming in, the pixels are fed from left to right, top to bottom.  Remember, DVI is exactly a VGA signal in digital form.  HDMI usually only is sent in YUV instead of RGB, but, the picture pixel elements are broadcast in the exact same left to right, top to bottom order.

In HDMI and DVI, there is also an 'Active Video' flag.  Like the Vertical sync flag and Horizontal sync flag, this flag tells you when during each pixel clock, a valid picture pixel is present.  In analog VGA, you need to to scan for these borders in the source video as different video standards have different active video regions.  Like I said, with DVI and HDMI, the 'Active video' or 'Video Enable' flag creates this rectangular region for you and it's embedded in the HDMI DVI standard.
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