Electronics > Beginners

Learning FPGAs for Video Processing

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BrianHG:
Remember, doing real time video transforms like color and simple enhancement, you don't need to cache video, just send the video input to your multipliers and then to video output copying clock, and pixel delay the HS and active video flag and VS to match the multiplier delay so the output picture is centered.  Line delay BRAMS may be used for 2D fir / convolution picture enhancement filters.  (Please do not go into Interlaced video, it's take you half a year to get this just right...)

A lower res OSD may be placed completely in FPGA cache memory (dual port BRAM) and genlocked and superimposed onto the video output for on screen controls and text.  Think about a 128 character font with onscreen color test and a programmable palette and transparency levels (R+G+B+Alpha blend) in the 8 to 16 color palette controls.

xxninjabunnyxx:

--- Quote from: BrianHG on January 20, 2019, 02:03:57 am ---Remember, doing real time video transforms like color and simple enhancement, you don't need to cache video, just send the video input to your multipliers and then to video output copying clock, and pixel delay the HS and active video flag and VS to match the multiplier delay so the output picture is centered.  Line delay BRAMS may be used for 2D fir / convolution picture enhancement filters.  (Please do not go into Interlaced video, it's take you half a year to get this just right...)

A lower res OSD may be placed completely in FPGA cache memory (dual port BRAM) and genlocked and superimposed onto the video output for on screen controls and text.  Think about a 128 character font with onscreen color test and a programmable palette and transparency levels (R+G+B+Alpha blend) in the 8 to 16 color palette controls.


--- End quote ---

Creating an OSD is the next step I want to take. I would like to create a line doubler as well.

james_s:
This sounds like a very ambitious project to start out with, I would suggest starting simple and then working your way up toward more complex stuff. The fact that you already know C may actually be more a hindrance than help. HDL looks like computer code superficially but it's a completely different concept. You're not writing a program, things are not executing in parallel, they're not executing at all. The code is describing digital hardware so you have to look at this not as a software design/coding problem but as hardware design. Figure out how you would go about your project using logic ICs because that is effectively what the FPGA gives you, a gigantic breadboard and an unlimited supply of any digital logic IC you could imagine. FPGA development is hardware design disguised as coding, most beginners stumble until this sinks in.

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