LM324 Power Supply with variable voltage and current

[Kleinstein]

The voltage recovery part looks reasonably good. There is still some overshoot, but not very much (some 700 mV). For the simple more PI like regulator it is hard to avoid some overshoot. The voltage regulation still looks rather slow.

The fast current limit is active for quite some time. This is in part due to the compensation and the circuit principle: a lower set voltage also reduces the gain of the current regulation. Due to the relatively slow voltage regulation the current loop can't be fast either. So in some cases the fast current regulation has quite some work to do and is active for a relatively long time.
It could be acceptable for a simple supply, especially if you are aware of this limitation.

[mike_mike]

I am uploading updated screenshots ( I found a problem, the the 39K resistor was 2k2 and I replaced it by 39k):
Same test conditions as here:

I tested with the following components: CV 4n7 and 10k, CC 1n and 10k, R4=3k3, R2=10k. The simulation in LTSpice was good.

Output votlage: 25.6V, I max= 3.06A
Fast CC: 0746-0747.jpg
On the output with PSU Shorter and R load at PSU Shorter = 0 R:
a. I max 0748.jpg
b. I med 0750.jpg
c. I almost min 0751.jpg

Are there any oscillations ? I am not sure if there are any oscillation at the first 2 screenshots because I see that the bottom lines are a little bit thick than other lines.

[iMo]

Why AC triigger?

[mike_mike]

I don't know if I need to use AC or DC trigger...

I am searching for some explanations on the internet about the AC and DC trigger.

For the first screenshots, it is correct to use AC coupling because I am seeing a repetitive signal on the 0.22R resistor, while on the last screenshots it is correct to use DC coupling because there is a DC signal coming from the power supply.

[iMo]

I do not see an issue on those last pictures.
The 2k2 vs 39k issue was not critical.

PS: a good point to measure is at the 0.22ohm slow CC shunt.

[mike_mike]

You said "last pictures"... I don't know if you was talking about reply #151 or about reply #151 and reply #149 ?
This also looks good ? It is with Vout=3.1V, with the probe on the 0.22R resistor, and with the output current at maximum.

[iMo]

I do not see issues on the last 21 pictures

[mike_mike]

I made some tests with 10R and 2R load at the PSU shorter.
1. On the output of the power supply
a. Vout=24.5V, Iout=3.06A, load=10R: 0752.jpg
Iout=half: 0753.jpg
Iout=almost min: 0754.jpg
1. On the 0.22R resistor (shunt)
b. Vout=24.5V, Iout=3.06A load=10R: 0763.jpg
Iout=half: 0762.jpg
Iout=almost min:0761.jpg

2. On the output of the power supply
a. Vout=16.29V, Iout=3.06A, load=10R: 0755.jpg
Iout=half: 0756.jpg
Iout=almost min: 0757.jpg
2. b. On the 0.22R resistor (shunt)
Vout=24.5V, Iout=3.06A load=10R: 0758.jpg
Iout=half: 0759.jpg
Iout=almost min:0760.jpg

3. On the output of the power supply
a. Vout=5.08V, Iout=3.06A, load=2R: 0765.jpg
Iout=half: 0766.jpg
Iout=almost min: 0767.jpg
3. b. On the 0.22R resistor (shunt)
Vout=24.5V, Iout=3.06A load=10R: 0769.jpg
Iout=half: 0770.jpg
Iout=almost min:0768.jpg

Please have a look at the screenshots and tell me what you think...

[Kleinstein]

The drop after applying the load and the overshoot when the load is removed is rather large. So one may have to increase the loop gain / speed up the voltage regulator.

The tringle type "ringing" after coming from lower voltage is kind of "normal" it happens with the output stage of for some time and the regulator running into some windup. This can be rather difficult to fix in the topology.

However there is a limit on how far this can be done in the simple PI like regulator. For much faster regulation the next step would be an RC (series) element in parallel to R12 as an additional D element. This would be some 2-3 K and an capacitor still to be optimized from simulation (some 1-10 nF as a guess).
One may also  want some additional back to back Diodes over the OPs inputs (if no already inside the OP).

[mike_mike]

In the screenshots were the voltage drop is big, there also the slow CC has been activated by the load, because the output current was reduced using the current potentiometer.
For example in the second and 3rd screenshots, there the slow CC has been activated...

If the power supply will remain as it is, what would be the consequences ? The same as the previous power supply discussed in this thread ?

[floobydust]

mike_mike, what's the schematic look like now.

Sluggish CC response can also be due to the op-amp(s) saturating and I have not seen LM324/LM358 data on how it behaves with large-signal differential input. I have seen clamp diodes between op-amp +,- inputs to limit that to +/-0.7V or +/-0.3V with Schottkys.

[mike_mike]

mike_mike, what's the schematic look like now.

This is the schematic that I have built on pcb. I have not included the current limiting led notification in the schematic, but on pcb there exists. The led notification schematic is the same with the one on reply #142.

[floobydust]

mike_mike you're doing good work. This could beat the chinese 0-30V 2mA-3A power supply kit, which would be a relief to us all.
I haven't contributed and don't want to upset things, so take all this lightly. You could polish this design, or keep experimenting.

C2 and C4 give a variable time delay depending on the potentiometer's position. I find you can get instability at low (V or I) potentiometer settings, made worse by the Sziklai having higher gain at low currents (beta droops at higher currents). Q7 needs to be flipped C-E?

I would consider changing the architecture, so the CC op-amp cannot affect voltage-setpoint accuracy.
U3's output voltage (high) will not be consistent. In CV mode, U3's output will sit saturated high and will move around with temperature and mood, so the voltage setpoint will be a bit drifty.
Also, CC mode includes a second delay of the CV op-amp. So CC mode transitions go through two stages- which is overall slower.
The 0-30V 2mA-3A power supply kit, the CC op-amp instead pulls down U4 (+) input.
Other PSU designs the two op-amps instead drive Q1 through a diode/transistor OR gate, where either (V or I) op-amp can fast control Q1. CC still has priority over CV of course.
I'd have to play with the LTSpice .asc and see if I can contribute anything.

[xavier60]

Diode ORing with independent CC and CV compensation would be a worthwhile improvement.

[mike_mike]

Q7 needs to be flipped C-E?

Q7 is flipped C-E in the practical built. This problem is only in the simulation. I used the transistor schematic from the previous power supply discussed in this thread.

I am attaching the simulation file...

I have found another problem...

Later Edit: The problem was solved. The screenshots show the fast CC (with the probe on the 0.22 shunt resistor) and with 0R load resistor:
Vout=24.2V
Imax:771
Imed:772
I almost min:773

[iMo]

Do add some serial esr (ie 0.5 ohm) to the output capacitors in the simulation .asc file.
The first peak is 7.7A FastCC, then there are two plateaus - it should be single one, imho.

Provided your shorter pulse is 1ms the first plateau ends with the pulse end, and then the second one continues for another 0.5ms/1ms/2ms based on I_limit setting.
So it comes from an RC around the CC opamp..

[mike_mike]

I added 0.5R series resistance to the capacitors.

Later edit: I will replace the old fast CC.

[mike_mike]

So it comes from an RC around the CC opamp..

I am attaching the screenshot with the new fast cc circuit (same schematic as in simulation).

Should I increase the value of the CC op amp capacitor ? (C5 and R7)
Or the problem is coming from C4 ?

[iMo]

You may also change the pulse such it mimics the psu_shorter

PULSE(0 1 0.1 10n 10n 1m 20m)

[mike_mike]

I used the pulse configuration as you said.
The results are attached.
The second plateau is also present in the simulation.
I tried with 470p and 2.2n for C5 and with 100p for C4, but there also is present the second plateau.

[iMo]

The second plateau comes from R7C5 time constant. The bigger C5 the longer the ramp at the TRIM_V wiper (input to CV opamp). It also affects the rising edge of the Vout.

Btw, how do you set the output voltage?

[mike_mike]

1. In the practical montage I set the output voltage to about 24V, and in the simulation, I set it to about the same output voltage as the practical montage.

I set it to about 24V, because at higher output voltages, for example at 27V, when I connect the load (aprox. 3Amps) then the output voltages falls with about 1-2V. I think that this is because the input voltage is also falling. The transformer that I used has a 24V secondary and 160VA power.

2. The second plateau is a problem that it needs to be solved, or it could be as it is ?

[iMo]

But how do you set the Vout? With which resistor or trimmers? What values for Vout=24V?

[mike_mike]

I set the Vout using the pot U6 from simulation. The curent (at this moment) value for this pot is 9.57k between the wiper and the gnd. The max value for this pot is 10.57k.
The other pot (the one for current) it is set to max (3.06A).

[iMo]

I would not go with this design. I think there are better designs - ie those with separated CC an CV.
For example the one with separate CC and CV pulling a current source (or the base of the Q1 in your schematics) via diodes.
Both work fine with Vouts much larger that Vcc of the opamps, and use the low-side shunt.

The Howland combo gives you much more precise CC setting, but it uses high-side shunt, therefore Vouts much larger than Vcc of the opamps is difficult to get (or not possible easily).