LTSpice Error paralleled voltage sources

[pharoaz]

Hey Guys, see attached circuit, running yields the following error: Voltage source V1 and voltage source E:U1:_U6:_U1:VSS_NEW are paralleled making an over-defined circuit matrix. You will need to correct the circuit or add some series resistance.

When i run the comparator by itself (see attached) i get the correct output

When i try to run the circuit and ground all the nodes of the lm2903B i am still getting an error {Voltage source E:U2:_U6:_U1:VSS_NEW is shorted making an over-defined circuit matrix...
You will need to correct the circuit or add some series resistance}, is my wiring in correct or are the spice models i am using causing issues? Please advise, this is driving me nuts 

[Sensorcat]

The first error message tells that an E-type source (voltage-controlled voltage) inside the model for U1 is parallel to V1. This must not happen, because these both determine the voltage between their nodes, but only one can. Mathematically, this is 'over-defined circuit matrix'.

The second error message tells that an E-type source (voltage-controlled voltage) inside the model for U2 is shorted. This must not happen, because shorting means zero voltage, but the voltage source value must determine the voltage, which creates the same problem as before.

The models for any IC put into a schematic are nothing else as a netlist, like, the one you create.

It is well possible that your circuit is OK, but the models of the ICs have a problem or do not work together. To find out, several iterations might be neccessary. At first, I would take the first schematic and insert a small resistor (e.g. 1 ohm) in series to V1, like LTspice suggested. Does the problem disappear? If yes, tweak the resistor value to something that does not matter in your circuit.

[Zero999]

Which models did you use?

My guess is there's an error with the symbols. No need to draw your own, use the generic op-amp symbol built-in to LTSpice.

I downloaded the models from TI's website and they worked perfectly for me.



I suggest you try them. If you're still having issues, post the .asc file, along with any libraries and symbols. The forum allows .asc, but the other files will need to be in a zip.

Oh and please use PNG, rather than JPG for schematics. JPG is lossy and optimised for photographs, so can make lines fuzzy. PNG is lossless and compresses line drawings really well.

[pharoaz]

Thanks for the reply! Where did you get these spice models from? I got mine from:

TLV1701 -> https://www.ti.com/product/TLV1701-Q1#design-tools-simulation
lm2903b -> https://www.ti.com/product/LM2903#design-tools-simulation

I downloaded the PSpice models for both sbom859c TLV1701 and slcj011e LM2903b; opened the .lib file in LTspice and right clicked the .SUBCKT line to create symbol (.SUBCKT LM2903B IN+ IN- Vcc GND OUT   )

[pharoaz]

Yes, while each component does work independently, when I import both your .asc files into the same schematic in ltspice i get the same error again

[Zero999]

The problem appears to be that is the models share an internal node. 

What I can't figure out is, with both models in the .asc file, why putting the TLV1701 in the schematic causes this error and using the LM2903B works.

EDIT1:
This is odd. I put a 1R resistor in series with the negative pin, to see what current was flowing through it, the voltage across it was 12V, which would lead to a current of 12A. I changed from a transient to DC operating point calculation to see if it made any difference but it didn't. Such a low value resistor shouldn't affect the operation of this circuit, because it's very low, compared to the other resistances in the circuit.

EDIT2:
The supply currents don't match either. Something strange is going on.

[Sensorcat]

Yes, it's something strange. pharoaz, you didn't do anything wrong, you're the victim.

After downloading the models and looking into the code, I found the reason:

In TLV1701.lib, we have (line numbers):

X_U6 V+ V+_BUFFER V- V-_BUFFER Supply_Buffer (46)
which creates a subcircuit Supply_Buffer, which is defined in ...

.SUBCKT Supply_Buffer V+ V+_BUFFER V- V-_BUFFER  (83)
X_U1         V+ V- V+_BUFFER V-_BUFFER SUPPLY_BUFFER1
.ENDS
which creates another subcircuit SUPPLY_BUFFER1, which is defined in ...

.SUBCKT SUPPLY_BUFFER1 1 2 VDD_NEW VSS_NEW (246)
EVDD_NEW VDD_NEW 0 VALUE = {V(1)}
EVSS_NEW VSS_NEW 0 VALUE = {V(2)}
.ENDS
which has a reference to the node 0, the global GND!

This is OK for a model that is only meant for evaluation, but not OK for use in actual circuits. The reference to 0 means that any circuit with this model has a hidden GND connection that is not visible in the schematic and cannot be changed by anybody who does not edit models.

lm2903b.lib has similar issues, it also includes sources with references to 0. So the two models share this node, which makes them sort of collide.

I do not have the time right now to suggest a modification that resolves it, but this is definitely the reason for the problem. I wonder what they were thinking at TI to publish these models. I have used quite some other TI models, but never found something like this.

[Zero999]

Yes, it's something strange. pharoaz, you didn't do anything wrong, you're the victim.

After downloading the models and looking into the code, I found the reason:

In TLV1701.lib, we have (line numbers):

X_U6 V+ V+_BUFFER V- V-_BUFFER Supply_Buffer (46)
which creates a subcircuit Supply_Buffer, which is defined in ...

.SUBCKT Supply_Buffer V+ V+_BUFFER V- V-_BUFFER  (83)
X_U1         V+ V- V+_BUFFER V-_BUFFER SUPPLY_BUFFER1
.ENDS
which creates another subcircuit SUPPLY_BUFFER1, which is defined in ...

.SUBCKT SUPPLY_BUFFER1 1 2 VDD_NEW VSS_NEW (246)
EVDD_NEW VDD_NEW 0 VALUE = {V(1)}
EVSS_NEW VSS_NEW 0 VALUE = {V(2)}
.ENDS
which has a reference to the node 0, the global GND!

This is OK for a model that is only meant for evaluation, but not OK for use in actual circuits. The reference to 0 means that any circuit with this model has a hidden GND connection that is not visible in the schematic and cannot be changed by anybody who does not edit models.

lm2903b.lib has similar issues, it also includes sources with references to 0. So the two models share this node, which makes them sort of collide.

I do not have the time right now to suggest a modification that resolves it, but this is definitely the reason for the problem. I wonder what they were thinking at TI to publish these models. I have used quite some other TI models, but never found something like this.

Thank you for taking the time to look into it.

I did the same, but I lack a thorough knowledge of SPICE, so thought I'd wait for someone else to comment. Even though my understanding is limited, reassuringly I found the same bits of code I came to the same conclusion: a conflict between the ground nodes. This is an example of how not to write a SPICE model. Unfortunately I don't have time or the proficiency to fix this.

[magic]

But wait, these E elements shouldn't be a problem if they output to an internal V+_BUFFER or V-_BUFFER node of the model. This isn't the same as the externally visible VDD node, which is shorted to V1 or to GND by the OP.

And the reason they contain ground references is because their input is the {V(1)} expression, which is clearly meant to be the ground referenced voltage on subcircuit's node 1, hence the output must also be referenced to ground to be equal to the input.

If LTspice says that E:U1:_U6:_U1:VSS_NEW is shorted with the external V1, it apparently interprets

Code: [Select]

EVSS_NEW VSS_NEW 0 VALUE = {V(2)}as an E element with its output on subcircuit node 1, which makes no sense

Maybe it's an LTspice bug?

edit
Maybe they screwed up and swapped some nodes in their subcircuit instantiations? I.e., VSS_NEW of the inner subcircuit is actually V+ rather than V-BUFFER of the outer subcircuit?

[Zero999]

This isn't a fix but a work around.

I found an old model for the LM2903, which is similar to the LM2903B. I changed the pin order to match the LTSpice symbol opamp2.asy and removed (analog) which LTSpice took to be another pin.
https://ltwiki.org/files/LTspiceIV/Vendor%20List/STMicroelectronics/Standard%20Linear%20ICs/Spice/lm2903.txt

It simulates, but I've not compared it to real life. I hope it's accurate enough for the original poster.


This isn't the first time an issue about TI models has been raised here. Another person had a similar problem with the TLE2426.
https://www.eevblog.com/forum/beginners/lte2426-problem/

[Zero999]

I've found a bit of time to look at the models and have fixed them.

On the LM2903B model, I changed GND node names to -V. LTSpice considers GND to be a synonym for node 0, which is 0V.

Both models had their sub, sub circuits, with the same names defined outside of the main sub circuit, making them global, so there were duplicate definitions. I moved the first .ENDS statement in each model to the end.

I can't believe I didn't notice this before.

I've changed it to a dual supply to verify it still works with the negative sub circuit nodes connected to another voltage than 0V.

[mtwieg]

Yeah both models have numerous subckts, some of which have the same names. This is bound to cause problems. Nesting the sub-subckts within each device might solve everything.

But it's silly to have so much bloat in an opamp model. It's like somebody was trying to win a code abstraction contest....

[Zero999]

Yeah both models have numerous subckts, some of which have the same names. This is bound to cause problems. Nesting the sub-subckts within each device might solve everything.

But it's silly to have so much bloat in an opamp model. It's like somebody was trying to win a code abstraction contest....

I think some the issues with the models might be due to incompatibility with implementation TI use, might allow GND as a net label name and isn't treated the same a node 0, but the global sub circuits and bloat are inexcusable.

I imagine many people here, including myself, were overwhelmed when they first saw the models, but the errors were simpler than the models.