LTSpice Simulation (incorrectly?) not sharing voltage over series capacitors

[frasdoge]

I've been debugging a circuit working incorrectly in LTSpice, and I've distilled it down to the following issue: steady state DC voltage is not being shared between series capacitors.

A typical use case for this might be when you need higher voltage rated caps, so placing 2 in series should share the voltage between them (while decreasing equivalent capacitance).

A DC operating point analysis in LTSpice is telling me that the first capacitor has a drop of 999.8853 mV while the second same value cap is taking the rest. It's correctly stating the resistor has no voltage drop.

Am I doing something silly? I've never had LTSpice incorrectly simulate something that didn't turn out to be my fault.

[frasdoge]

It seems that by doing a transient analysis and opting to "skip initial DC operating conditions" it works correctly and shows 500 mV shared between the 2 capacitors correctly.

I don't know what assumptions it's making during the DC operating point but is there a way to disable the ones causing this issue?

[ataradov]

For the initial DC conditions it assumes that capacitors are open, and the ideal capacitors just disappear.

To simulate real capacitors just add very big parallel parasitic resistance in the  capacitor settings. Something like 100 GOhm, it does not matter, and will not affect the rest of the circuit, but will allow it to figure out DC point correctly.

[Power-Electronics]

I encountered this issue for the first time myself just last week. Another solution I found was to provide an initial condition setting the middle node voltage to the correct value.

http://ltwiki.org/index.php?title=IC_set_initial_conditions

It made sense for me because I wanted to see how the capacitors depleted, so they both had initial conditions instead of a voltage supply. But otherwise, that would probably be an inadvisable hack.

[magic]

The truth is that it doesn't matter what voltage is there, any solution is equally valid as SPICE has no concept of capacitor voltage ratings. It seems that zero is as good an initial value as any other; at least it will give you the expected result if you simulate charging a stack of capacitors from zero. I suppose SPICE could also divide the voltage inversely proportionally to capacitance as you expect, but that's an extra functionality somebody would need to implement - it seems that no one bothered yet

I'm moderately surprised that SPICE didn't simply fail with a floating node error.

In the real world you also may have some random charge stuck on the middle node which may take a long time to dissipate through leakage.

edit
Note that there are somewhat obscure options to add parasitic conductance or capacitance between circuit nodes and ground or between each other. The option which could pull floating nodes towards ground is gshunt, but according to LTspice manual its default value is zero.

[Zero999]

In real life the steady state voltage will not be equal across both capacitors, because they will have different leakage currents.

Here's an example showing the capacitors with values +/-10% off 4.7µF, which is realistic for components which often have a tolerance of 20%. Even the transient voltages will differ has the ESR and values won't be equal either. Note that the final steady state voltages given on the labels, when the simulator is set to calculate the steady state operating point, differ from the transient response, unless .tran is run for a very long time. In other words, there's little point in simulating the circuit.

[armandine2]

Rser?

[Zero999]

Rser?

Rser = series resistance
Rpar = parallel resistance

[armandine2]

That's definitely the level I'm at - although I can imagine that capacitors have a series and parallel resistance - not sure where any of the figures have come from (other than the range of capacitance values).

[Zero999]

That's definitely the level I'm at - although I can imagine that capacitors have a series and parallel resistance - not sure where any of the figures have come from (other than the range of capacitance values).

I got the values by doing some quick calculations, based on data sheets, I found using a search engine. The ESR is probably realistic, but the parallel resistance might be a little pessimistic, as the leakage current is often specified, at the high end of the temperature range and when the capacitor is new. It tends to drop, at lower temperatures, after a burn in period.

[armandine2]

On a practical note - I take it - that the capacitor's DC series and parallel resistance are not measurable (generally) with your typical handheld LCR meters - I have the IET DE-5000 user manual to hand and cannot see it there.

[armandine2]

It looks like the series resistance can be found by sweeping with ac input frequencies - like to see that.

[Simon]

Using simulators requires full understanding of how components in the real world behave an what their "parasitic" properties are. So much of what we are used to seeing in the real world is due to parasitics.

[armandine2]

I see now that the Rser = ESR

[JohnG]

Also in the real world, you may want to put a resistor in parallel with each capacitor such that they carry a current at least as big to several times the expected cap leakage current (you don't need to be very exact, because you are unlikely to get exact leakage numbers for caps at any rate).

The reason is because the leakage in caps can easily vary by a factor of two or more, depending on cap technology. This is shown above, which means that if you don't do anything, the caps are likely to become unbalanced.

If you want to minimize the extra current drain, you can use zener diodes instead of resistors, with a voltage rating equal to the max voltage you ever want to see on the cap. It will conduct just enough current to support the difference in the capacitor leakage currents.

John

[RoGeorge]

There is no such thing as a "shared voltage".

That circuit is called "capacitive voltage divider".  The capacitive voltage divider is usually seen dividing AC voltages, but can work as a DC voltage divider, too.  When used as a DC voltage divider, it matters not only the capacitance of each capacitor, but the initial charge (voltage), too, leakage currents, etc.  That is why a capacitive voltage divider for DC usually will have balancing resistors in parallel with each capacitor.

If no balancing resistors, both capacitors are ideal, and both are discharged initially, then the smaller capacitor will develop a higher voltage, because in series capacitors (no matter each capacitor's capacitance) can only charge with equal electric charges, \$Q_1 = Q_2 = Q\$.  This is so because the current in a series circuit is always same \$I_1 = I_2 = I\$, and by definition \$I = \frac{Q}{t}\$, therefore \$Q_1 = I t \ and \ also \ Q_2 = I t\$.

Now to look at the voltages, by definition \[C = \frac{Q}{V}\] therefore \[V_1 = \frac{Q}{C_1},\ \ \ V_2 = \frac{Q}{C_2}\] So, if \$C_1 < C_2\$, then \$V_1 > V_2\$.  The smallest capacitor will develop the higher voltage, with the ratio: \[\frac{V_1}{V_2} = \frac{C_2}{C_1}\]

[Power-Electronics]

I see now that the Rser = ESR

It's explained in the LTspice documentation for capacitors.

http://ltwiki.org/index.php?title=C_Capacitor

[armandine2]

I found a convincing piece on this in an old text I recently got hold of - also describes the practical impedance measurement that I'd sketched above.

Apologies for side tracking the thread with this stuff - seemed like a line of inquiry at the time.