MOSFET Layout Questions

[steve1515]

I'm playing around with a small transmitter circuit for 60kHz to simulate a time signal in my home. I have a purchased 60kHz ferrite antenna to use for this. It's pre-tuned with an onboard capacitor. I originally stated with the circuit pictured in the KiCAD schematic (similar to something I found online). It worked on the breadboard, but when I made a PCB, one of the MOSFETS immediately blew up. I did some research and learned that the circuit is probably not a good one due to using 5V on the source of the P-channel while using 3.3V on the gate to drive it. After my research, I drew up the hand drawn schematic. It seems to work on the bread board, but I wanted to know if anyone sees any issues with it or ways to improve it.

Basically, the Raspberry Pi is sending out a 60kHz clock on the GPIO pin and the software turns the GPIO to an input in order to attenuate the signal periodically. This is how the 60kHz WWVB signal in operates to indicate a time code.

I'm not too sure if I have the best resistor values or placements here, but this is what I was thinking...
1) R1 will limit the current to 250mA at most and also protect the circuit if the MOSFETS are both shorted for some reason.
2) R2 pulls up Q2 and Q3 gates when Q1 is not conducting.
3) R3 limits the current flowing from the GPIO pin to not more than 16mA.
4) R4 pulls the gate down when the GPIO is set as an input. (The Raspberry Pi has an internal 50k pull up when set as an input and I'm not sure if I need this or if this 10k affects the circuit negatively.)

What do you think? Any thoughts on this? I'm no expert on MOSFETs and wanted some advice and some people to look this over.

Thanks!

[T3sl4co1l]

The rPi outputs 3.3V (or most likely does, I'm not up on all the variants), so you aren't getting sufficient gate drive voltage to the PMOS at least.

The first circuit is fine if powered by 3.3V, and "logic level" type MOSFETs used (look for Rds(on) measured at Vgs(on) = 3V or so).

The series resistor allows the LC resonator to work, reducing harmonics from the switching.  It would be better if a series inductor were used, of value suitable to match the desired inverter output impedance to the load, while tuning it for resonance (if the antenna is parallel tuned to resonance already, you may need additional capacitance to do this).

The second circuit solves the Vgs issue but misplaces the resistor: as shown, the NMOS short-circuits the antenna, preventing it from resonating half the time.  Keep impedances consistent throughout the cycle, so that the system can be treated as a LTI (linear, time-invariant) network and all the usual AC steady state circuit laws apply.

Tim

[PGPG]

I don't know how it is in United States but in Europe frequencies officially used are law protected against being used by not approved and certified devices and there are special agencies that control radio emissions.
20 years ago I have read some articles under the common subject EMC banana skins. In one was described (may be a legend) that in some new (very big and expensive those time) TV set it happened to radiate a not modulated signal at frequency that was used as distress signal on the ocean tracked by satellites. The man leaving just by the beach (if remember well it was in USA) was very surprised when a rescue helicopter landed in his yard.
He was told that this time they will forgive him but if he turns on the TV again he will pay for the action. Of course TV was redesigned and he got it replaced.

[steve1515]

I don't know how it is in United States but in Europe frequencies officially used are law protected against being used by not approved and certified devices and there are special agencies that control radio emissions.

You are likely correct, but this is so low power at 60kHz that it will only work within one room and only goes about 10 feet max with line of site. It's pretty much only to set clocks due to not being able to receive the WWVB signal here.

The second circuit solves the Vgs issue but misplaces the resistor: as shown, the NMOS short-circuits the antenna, preventing it from resonating half the time.  Keep impedances consistent throughout the cycle, so that the system can be treated as a LTI (linear, time-invariant) network and all the usual AC steady state circuit laws apply.

Wouldn't I want to short the antenna when I'm not transmitting? The way the signal works is it either transmits a 60kHz wave or it transmits nothing. Every second it's either 60kHz or off based on the current time. One bit per second essentially.

I figured that would be the best way to get the signal to stop quickly, but I wasn't sure. I had thought about also putting a TVS in parallel with the antenna too.

Do you think it's still better to move the resistor in series with the antenna?

[T3sl4co1l]

The second circuit solves the Vgs issue but misplaces the resistor: as shown, the NMOS short-circuits the antenna, preventing it from resonating half the time.  Keep impedances consistent throughout the cycle, so that the system can be treated as a LTI (linear, time-invariant) network and all the usual AC steady state circuit laws apply.

Wouldn't I want to short the antenna when I'm not transmitting? The way the signal works is it either transmits a 60kHz wave or it transmits nothing. Every second it's either 60kHz or off based on the current time. One bit per second essentially.

I figured that would be the best way to get the signal to stop quickly, but I wasn't sure. I had thought about also putting a TVS in parallel with the antenna too.

Do you think it's still better to move the resistor in series with the antenna?

It only emits a signal if it's pulsing, quite consistently, at 60.000 kHz.  Small timing changes (once every second), probably as duty cycle, approximate amplitude shift modulation. The carrier is always active, so there's no need (or want) to short it out -- certainly not constantly for ~half of a cycle!

See: https://en.wikipedia.org/wiki/WWVB

Tim

[steve1515]

I think I see... I wasn't even thinking that when I'm transmitting there's a 'off' period every cycle. 

So that makes sense then... I can move R1 in series with the antenna. If I do that is there anything else you would recommend changing before I try out with a PCB?

Is there any good way to add a resistor to protect in the event that both MOSFETS short? I don't see any good way to simply do that. But I'm also not sure if it's anything to be concerned about. I think when picking out MOSFETS, I just need to make sure I don't have overlapping Vgs(th) regions so they aren't both on at the same time.

[T3sl4co1l]

You could put one on each drain I suppose.

I'm guessing the current draw isn't very much anyway, and I'd just as well put in a 74HC04 with 5 or 6 sections in parallel as a mondo-buffer, or use a low-side gate driver (basically a glorified CMOS buffer + level shifter).

Tim

[PGPG]

to protect in the event that both MOSFETS short? I don't see any good way to simply do that.

You can insert some delay between switching one off and switching second on.

[steve1515]

I've re-worked this a little based on the comments here and I currently have the circuit pictured. The differences are that I added an LED and R5 and the R6 resistor on Q2's drain. I'm getting some strange results though.

I've used a BSS138K ( https://www.onsemi.com/pdf/datasheet/bss138k-d.pdf ) for Q1 and when I do not connect Q1's drain to Q2/Q3 gates, then my scope shows the voltage goes between 0V and 5V as expected when Q1's gate is switched from 0V to 3.3V.

I've used a BSL215C ( https://www.infineon.com/dgdl/Infineon-BSL215C-DS-v02_02-en.pdf?fileId=db3a30431add1d95011aed4394210289 )  complimentary N/P-channel pair IC for Q2 and Q3. When I connect Q1's drain to Q2/Q3's gates as shown in the picture, my scope shows that the voltage at Q2/Q3 gates only goes from 0V to about 3V.

Why would this happen? I'm not seeing why connecting to Q2/Q3 gates would pull the 5V down to about 3V. Am I doing something wrong here? What am I missing? 

[T3sl4co1l]

What are the voltages (and waveforms) at all points in the circuit, when connected?

Tim

[steve1515]

Here's what I measured with the antenna/cap combo replaced with a 20 Ohm resistor:
I figured taking the coil out of the equation would simplify things for now.

@ Q1 gate = Square wave, -0.27V to 3.13V
@ Q2/Q3 gates = Square wave, 0V to 2.73V
@ Q2 drain = Square wave, 0V to 4.83V
@ Q3 drain = DC 4.83V
@ R1/R6 junction = Square wave, 3.23V to 4.90V

Thank you for your help!

[T3sl4co1l]

Check Q3 pinout.

Tim

[steve1515]

I re-checked the pins and things looked right, so I did some testing and found that I was getting about 500-900 ohms of resistance from gate-source and gate-drain on Q2. I replaced the part and things seem to be working correctly now. Not sure what happened.

Thanks for your help!