Author Topic: MAX vs typical propagation delay on IC  (Read 800 times)

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Offline coaxialgamerTopic starter

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MAX vs typical propagation delay on IC
« on: November 17, 2017, 08:56:42 pm »
I'm currently working on a project involving logic IC's ( the 74F series specifically ) , and i'm slightly confused about the propagation delay ratings shown in the datasheets . Here's the specs found in the 74F374 for example ( below ).

There's a huge difference when comparing the typical delay vs the maximum delay ( >50% or more! ). How is this rated?

Does it mean the same IC , in the same operating conditions might suddenly take 2X longer one operation ? Or are those rating there to account for variability in the different chips themselves ? If that is the case , how often do they reach those max rating , and do the vast majority of the chips you buy run at typical speeds?
 

Online T3sl4co1l

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Re: MAX vs typical propagation delay on IC
« Reply #1 on: November 17, 2017, 09:37:02 pm »
A given chip will give consistent operation (low jitter).  The measurement is taken over manufacturing variation.

I don't know what statistics are used.  I might guess about a 3 sigma cutoff, so you're very likely to get a typical part.  (Note that the statistics of this particular parameter aren't going to be Gaussian, because the time certainly can't be negative.  Likely it's a Gaussian warped by a physical process, so it has a minimum cutoff of so-and-so, a typical somewhat higher, and a long tail that is truncated by the max during testing.)

Ideally, you should design your system so that, even if a single chip were malfunctioning, in such a way that it had extreme jitter from cycle to cycle, but still met its timing spec, the system still works.  Clocked state machine logic has this property, which is part of the reason why it's so popular.  (The other being it's easy to synthesize!)  Such designs aren't always possible (many systems require controlled jitter, high frequency purity, that sort of thing -- especially cutting edge signal processing systems), but this helps whenever possible.

Tim
Seven Transistor Labs, LLC
Electronic design, from concept to prototype.
Bringing a project to life?  Send me a message!
 
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Offline danadak

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Re: MAX vs typical propagation delay on IC
« Reply #2 on: November 17, 2017, 10:29:15 pm »
My experience as test engineer quite old, but we used 5 runs typically,
and characterized most of those parts. Then added a fixed percentage
guard band to that, 20% typically. Depended on process. This was before
big data  procedures were used.

Customer specific parts test programs would be more extensive. Stuff
like standard logic, were not extensively AC tested. Characterization
data derived limits used. Then periodic samples taken and a characterization
test tape was run on the parts still meet data sheet specs.

You could contact an FAE at the vendor, and submit to him a list of questions.
In some cases the FAE may put you in direct contact with production engineer.



Regards, Dana.
Love Cypress PSOC, ATTiny, Bit Slice, OpAmps, Oscilloscopes, and Analog Gurus like Pease, Miller, Widlar, Dobkin, obsessed with being an engineer
 
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