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| ker2x:
--- Quote from: ker2x on October 09, 2019, 06:10:21 am ---It's been only a day so i can't decide what to do yet. --- End quote --- Huh... this sentence may lead to a grave misunderstanding. :palm: It's not like i woke up monday morning and decided to do this. It's been on my mind since much more time than that and i already have some 100% software project in progress. And i played with developing interpreters, OS, computer design, since a long time. |
| ker2x:
Would you suggest a zynq or an artix ? i probably have no use for the ARM core but... just asking. edit : i forgot that their website was an absolute nightmare in the past and didn't get any better. |
| rstofer:
Are you aware of the Ben Eater project? https://eater.net/8bit I worked on that for a while until I lost interest in making breadboard jumpers. Nevertheless, it's a pretty cool project and demonstrates quite nicely how a CPU actually works. As I said earlier, this is my favorite board: https://store.digilentinc.com/nexys-a7-fpga-trainer-board-recommended-for-ece-curriculum/ Given the 100T version, I can fit a 64k word 16 bit RISC processor in there with the following utilization BlockRAM 24% <--- there's quite a bit of BlockRAM left for things like disk buffers and such IO 25% <--- I am using a lot of IO to drive the gadgets on the board but I can only do that once LUTs 1% <--- the fundamental logic blocks FFs 1% <--- flip flops BUFG 3% <--- used for clock nets. I didn't deliberately instantiate any BUFGs in this design In other words, a fairly complete RISC processor (the LC3 project) rolls around like a BB in a Bowling Alley. I can add features like disk IO and never put a dent in the use of LUTs and FFs. This thing is a virtual dumpster full of chips. ETA: Suppose I do decide to add an SD card. I could build the controller in logic or I could plunk down another RISC core (with much less BlockRAM) and write the driver in C. All I would need to do is add a DMA system to share the BlockRAM between the main RISC core and the SD controller. I might even be able to use the dual-port feature of the BlockRAM and keep the CPU on one side and all of the IO devices on the other side. This means the DMA controller/channels are on just one side of the BlockRAM and the CPU can run uninterrupted by memory collisions. I could also instantiate a Xilinx core and use their tools to port an entire network stack. And STILL the main CPU could run uninterrupted. And I haven't even gotten to the bit about using the DDR as static RAM with code provided by Digilent. I have a lot of FPGA boards (for a hobbyist) and most of them feature a lot of gadgets. I don't really like the naked boards because development is slowed while I hack in some LEDs and displays. I consider the gadgets as far more important than the chip itself. I don't have a Zynq board and I haven't found a need for one, yet. Obviously, using the ARM core to drive all the IO devices for a low end RISC core makes no sense at all. Just buy a Raspberry Pi 4 and be done with it. One day I may find a reason for that board and, sure enough, one will wind up on my bench in a few days. Artix 7 seems to be the chip of choice at the moment. Older versions (Spartan II, Spartan 3 and up to Spartan 6, I believe) need to use ISE 14.7 as the toolchain and this is obsolete and not really supported. It is far better to pick a chip that is supported by Vivado. Within a family, BlockRAM is the biggest discriminator. You need all the BlockRAM you can get. If the incremental cost isn't a show stopper, get the biggest device available. I didn't mention any of the non-Xilinx vendors. I simply don't have any experience with them. |
| ker2x:
--- Quote from: rstofer on October 09, 2019, 03:06:25 pm ---Are you aware of the Ben Eater project? https://eater.net/8bit --- End quote --- Yes, i follow his youtube channel :) |
| ker2x:
--- Quote from: rstofer on October 09, 2019, 03:06:25 pm ---As I said earlier, this is my favorite board: https://store.digilentinc.com/nexys-a7-fpga-trainer-board-recommended-for-ece-curriculum/ Given the 100T version, I can fit a 64k word 16 bit RISC processor in there with the following utilization --- End quote --- Perfect, it was in my wish-list already so i just ordered it. I'll receive it in 2 or 3 days. The other one in my wishlist was this one https://store.digilentinc.com/basys-3-artix-7-fpga-trainer-board-recommended-for-introductory-users/ Cheaper, smaller fpga, no DDR, no audio. About DDR, i had a board with DDR, it seamed to be really difficult to use. Digilent have a github repo with this : https://github.com/Digilent/Nexys4DDR i hope it's what i think it is :) |
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