Author Topic: modern TTL/Logic-gate/74xx  (Read 10106 times)

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Offline ker2xTopic starter

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modern TTL/Logic-gate/74xx
« on: October 07, 2019, 04:50:42 pm »
Friendly greetings !

I'm a beginner with hardware project (my last circuit board was 30 years ago), and "slightly" obsessed with CPU design, Compiler design, OS development, ... (well, i'm an IT engineer).
I'm currently designing, in software, my own cpu, emulator, os, assembler, BASIC. (in fortran, because that's how i roll (i may switch to C/C++/C# for the compiler)).

of course i want to do it in hardware too, because why not ? (well, that would require to switch to a 8 bit CPU but i don't mind).
I played with FPGA, but it's too much of a pain, i just don't get it. (beside, VHDL look like ADA and i have a massive PTSD with ADA.)
I will, of course, implement the design in logisim first, then on a circuit board emulator, then, hopefully, in hardware.

And i totally want to design the PCB, it will be 99% of the fun for me.

However, i checked a lot of video, tutorials, sources, etc... and it's all good old 74xx, massive chips with 2 or 4 gates.
Are there modern highly integrated surface mounted TTL chips ? (with dozens of gate per chips)
I don't want to solder it, i'll just send the files to a PCB Prototyping Company (JLCPCB & co) so SMT is the way to go (much cheaper, right ?).

Is there a list ? a reference website ? a reliable source ? I want at least a rough idea of the kind of chipset i can use, read the datasheets, etc.
I'll design the cpu based on the available hardware (i also have a 32 bits design in progress but it will be 100% emulated in software and pretty much impossible to replicate in hardware (eg: complex number ALU))

I'm super early in the process, i'm just exploring the whole stuff in order to get the idea of what's ahead. Thanks to eevblog i have a rough idea of how difficult it is to complete a full project.

I considered, since many years, to do easier projects but there are no other project that interest me. Believe me, i tried. But nope, CPU or bust !
I may do a "modular" CPU just so i can create multiple PCB and if i fail i'll just have to redesign a single PCB (with less chips) instead of the probably expensive full CPU for every countless mistake i'll make.

Thank you !

Super important PS :
- It's useless to tell me to give up, even if you're 100% sure that i'll fail : just let me enjoy the process and the magic smoke. i'll still learn anyway.
- When i write "cpu" : it will be a working computer. But i'll just use whatever microcontroller available for the non-cpu part of the computer (eg : a pic board, arduino, raspberry pi, or even an fpga with an soft-cpu ip core... anything easily programmable with serial<->usb communication and enough I/O). And it will be easier that way to test the "sub-pcb" piece by piece (i do have an oscilloscope and logic analyzer if needed)
often times... there are other approaches which are kinda crappy until you put them in the context of parallel machines
 

Offline oPossum

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Re: modern TTL/Logic-gate/74xx
« Reply #1 on: October 07, 2019, 04:58:44 pm »
Are there modern highly integrated surface mounted TTL chips ? (with dozens of gate per chips)

I think this is as close as you will get to that... https://www.microchip.com/ParamChartSearch/chart.aspx?branchID=30024
 

Offline ker2xTopic starter

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Re: modern TTL/Logic-gate/74xx
« Reply #2 on: October 07, 2019, 05:09:15 pm »
I'll just add some bonus question here :

Thanks to my painful experience with FPGA i have a rough idea of the importance and difficulty of timing.
I'm planning to have massive safety margin and make the cpu run super slowly, i'll be happy with a few KHz (or is it too much already ?)
And thanks to the multi-board design it will have absurdly long trace (and potentially EM sensitive wire too) so high clock speed (1+ Mhz) is probably impossible anyway

Bonus question N°1 : But being slow come with problems too, it seems. how slow can it be ?
The only thing i know is that some type of ram need to be refreshed and that's it.
I have ZERO idea of the potential problems that can come with a slow clock.
So any random tought about it are much welcome.

Bonus question N°2 : Can i just use my whatever-glue-microcontroller to handle the clock ? (Since i'll have one for sure to emulate the non-cpu part of the computer)
Bonus question N°3 : the memory isn't technically part of the CPU (except the registers), should i use, by design, an hardware memory chip or let the microcontroller emulate it ?

thank you, twice. (i don't know how to say 3x in english, sorry, thrice ?)
often times... there are other approaches which are kinda crappy until you put them in the context of parallel machines
 

Offline ker2xTopic starter

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Re: modern TTL/Logic-gate/74xx
« Reply #3 on: October 07, 2019, 05:12:21 pm »
Are there modern highly integrated surface mounted TTL chips ? (with dozens of gate per chips)

I think this is as close as you will get to that... https://www.microchip.com/ParamChartSearch/chart.aspx?branchID=30024

Thank you for the quick reply. But it's a list of PLD chips, it's even worse than FPGA in my book.
There is now way around it ? i have to use either very low density 74xx OR a PLD/FPGA ? Nothing in-between ?

EDIT : i might be too harsh with the CPLD, there isn't anything worse than an FPGA.  :box:
« Last Edit: October 07, 2019, 05:16:20 pm by ker2x »
often times... there are other approaches which are kinda crappy until you put them in the context of parallel machines
 

Offline magic

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Re: modern TTL/Logic-gate/74xx
« Reply #4 on: October 07, 2019, 05:18:34 pm »
There are some more complex 74 series ICs like complete flip-flops, multiplexers, decoders. I have even seen some vintage 74-something ALU-on-chip. Wikipedia has a list of hundreds of 74 series parts, but beware that many are unobtaininum and/or have never been made in CMOS.
 

Offline schmitt trigger

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Re: modern TTL/Logic-gate/74xx
« Reply #5 on: October 07, 2019, 05:39:28 pm »
You will find 74HCxx series of chips in SMT format, although some of the more obscure functions are no longer supported.

Designing a simple microcontroller with 74HC chips is doable. Many years ago, an acquaintance of mine actually built one, although it goes without saying, it was very rudimentary.
He actually had a lot of fun doing it, and gained a lot of respect for the people who actually design microcontrollers
 

Offline ker2xTopic starter

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Re: modern TTL/Logic-gate/74xx
« Reply #6 on: October 07, 2019, 05:50:56 pm »
By the way, the "modular" cpu idea come from the MegaProcessor :
often times... there are other approaches which are kinda crappy until you put them in the context of parallel machines
 
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Offline ker2xTopic starter

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Re: modern TTL/Logic-gate/74xx
« Reply #7 on: October 07, 2019, 06:12:58 pm »
There are some more complex 74 series ICs like complete flip-flops, multiplexers, decoders. I have even seen some vintage 74-something ALU-on-chip. Wikipedia has a list of hundreds of 74 series parts, but beware that many are unobtaininum and/or have never been made in CMOS.

Yeah, i don't want it to be "retro" 74xx. Expensive, unavailable, won't be able to have a PCB company populate the board with their machine.
That's why i'm looking for modern gate chips.

I checked mouser.fr for logic gate and found tons and tons of stuff : https://www.mouser.fr/Semiconductors/Integrated-Circuits-ICs/Logic-ICs/Logic-Gates/_/N-6j787
But a beginner like me would have to reads hundred and hundreds of datasheets in order to find something that look like something i want.

Of course i'll have to read many datasheets for fine picking the exact parts but just this website give me 4875 results for "logic gate" and it's just too overwhelming.
I may end up looking at something totally overkill, or much more expensive that it should, or super specialized that won't even work on my loose tolerance design... and not even notice the fine print that tell me that there is no way it will works on my project.



often times... there are other approaches which are kinda crappy until you put them in the context of parallel machines
 

Offline ker2xTopic starter

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Re: modern TTL/Logic-gate/74xx
« Reply #8 on: October 07, 2019, 06:37:14 pm »
My last hope would be to use an EEPROM, it totally works and it's 100% available. But a totally different design and project.
This is why i need to consider the hardware first.

Sorry, i'll stop spamming now. It's evening and a bit tired after a full day of database nightmare. ("What are you talking about ? this server was trashed a long time ago" "mmm, nope, i'm logged in and it appears it ran flawlessly since 2009 until now")
« Last Edit: October 07, 2019, 06:50:17 pm by ker2x »
often times... there are other approaches which are kinda crappy until you put them in the context of parallel machines
 

Offline magic

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Re: modern TTL/Logic-gate/74xx
« Reply #9 on: October 07, 2019, 06:39:15 pm »
The one chip ALU you can probably forget, but many 74 series stuff is still being made, no problem. I think Mouser has the ability to restrict search to particular families like 74HC so you could see what's available using Wikipedia as quick part number decoder. FFs, counters, decoders, muxes, buffers you will get for sure and that alone may reduce component count quite a bit compared to bare logic gates.
 

Offline ker2xTopic starter

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Re: modern TTL/Logic-gate/74xx
« Reply #10 on: October 07, 2019, 06:54:34 pm »
The one chip ALU you can probably forget, but many 74 series stuff is still being made, no problem. I think Mouser has the ability to restrict search to particular families like 74HC so you could see what's available using Wikipedia as quick part number decoder. FFs, counters, decoders, muxes, buffers you will get for sure and that alone may reduce component count quite a bit compared to bare logic gates.

Ha thank you ! I tried to restrict to "74" and "SMD/SMC", expecting to have the full 74xx range but it only returned 10 result and all of them were diode.
Yeah, i don't want to buy an ALU, it would defeat the purpose of the project. If i just wanted a cpu i could just buy one for much cheaper than building one with logic gate  ;D

I see some toshiba part... didn't they go bankrupt decades ago ?  ???
Nexperia seems to be specialized in automotive so i'll probably forget about it.
SMT do some parts.
Most chips seems to come from "ON Semiconductor" so i'll just go with that. i guess ? And they provide the ECAD Model, which is a must have.
« Last Edit: October 07, 2019, 07:02:29 pm by ker2x »
often times... there are other approaches which are kinda crappy until you put them in the context of parallel machines
 

Offline rstofer

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Re: modern TTL/Logic-gate/74xx
« Reply #11 on: October 07, 2019, 07:36:19 pm »
Search the Internet for 'LC-3' a very nice RISC design that isn't necessarily implemented in hardware but the project does include the microcode worksheet and a full-blown transition diagram.  There is a related book by Patt and Patel that describes everything you need to know about logic and system design.  The project comes with a C compiler and an assembler.

https://www.amazon.com/Introduction-Computing-Systems-Gates-Beyond/dp/0072467509


There is also a newer version of LC-3 known as LC-3b which is based on byte addressing instead of 16 bit word addressing.

Here is some documentation on the LC-3b project:
http://users.ece.utexas.edu/~patt/05f.360N/handouts/360n.appC.pdf

Similar documents are out on the web for the original LC-3 project.

When you block out your TTL, count the number of wire-wraps.  Heck, just count the number for a 16 bit register and then realize that I can declare such a register with one line of code and manipulate it in a small 'process' for things like load and clear.  I can even do an add '1' in case I am implementing the Program Counter.  Maybe 10 lines of code...

The LC-3 CPU state machine uses 1000 lines of VHDL plus another 400 for things like registers and memory while the UART and Baud Rate Generator add another 400 or so.  So, for about 2000 lines of code I didn't have to wire-wrap a single device.  I didn't need to buy chips and sockets, all I needed was an FPGA board.

Now, I went all-in on the FPGA board because I like peripherals like 7 segment displays, LEDs, switches and buttons.  But that's just me!
https://store.digilentinc.com/nexys-a7-fpga-trainer-board-recommended-for-ece-curriculum/

In theory, I could add enough hardware to include networking but that's a little above my skill level.  At a minimum, I would be using a LOT of Xilinx IP to do such a thing.

Duplicating the LC-3 project is probably not interesting to you as you have your own design concepts.  But the thing is, when you hit a design wall, it's pretty cheap to rip out VHDL and do it over.  Not so simple with wire-wrap.  HINT:  Write a program that has some kind of datastructure for your netlist.  The idea is to print out a wire-wrap list by level that will put the wire ends on the same level.  There would usually be just a first level list and a second level list.  You would do this because it is easier to disassemble.  At most, you remove 3 wires.  If you wrapped the wire as a daisy chain, you could possibly have to remove the entire chain to make one little fix.

I took an IBM 1130 and all of its peripherals and stuffed it into an FPGA about the size of a postage stamp.  It runs all of the factory software, unchanged.  And it runs at 50 MHz instead of 400 kHz and if I wanted to spend a little more time on the project, it would probably run at 100 MHz  It's about 10,000 lines of code as I recall but there is a lot of code tied up in the line printer, card reader, bouncing ball typewriter, keyboard, disk subsystem, DMA system and, of course, the 1627 drum plotter.  FPGAs are amazing!  So was the 1130 when I was wandering through undergrad:

http://ibm1130.org/

Of course I'm going to champion FPGAs!  It's like having a dumpster full of logic just waiting for a design.

Typical transition schedule for FPGAs:  Blink an LED then build a CPU.  Not much in the middle...
 

Offline edavid

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Re: modern TTL/Logic-gate/74xx
« Reply #12 on: October 07, 2019, 07:46:33 pm »
Your questions are really confusing.

1. There are still many standard logic ICs available in various CMOS versions.  For a good introduction, see the TI website: http://www.ti.com/logic-circuit/support-training.html

2. There are many homebrew CPUs built out of MSI logic ICs instead of simple gates.  For examples see: https://www.homebrewcpuring.org/

3. There is indeed a big difference between CPLDs and FPGAs: CPLDs can be programmed via schematic capture.  So even if you don't want to learn an HDL, you could still consider CPLDs.

4. If you just hate VHDL, you should look at Verilog, which is not Ada like.
 

Offline magic

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Re: modern TTL/Logic-gate/74xx
« Reply #13 on: October 07, 2019, 07:55:26 pm »
I did say: 74HC :P
Or maybe 74LVC, that's a newer one.
 

Offline rstofer

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Re: modern TTL/Logic-gate/74xx
« Reply #14 on: October 07, 2019, 07:56:56 pm »
Another fun way to design CPUs is with microcoded design and the old AM2900 series logic.  There are still AM2901 (4 bit slice) on eBay for reasonable prices.  It would take a bit of research to find all the proper chips but there aren't many different devices in the family  Plus you need some kind of flash for the microcode.  Full-on EPROM might be a little prohibitive in the early stages.  I took a class on these devices many years ago and we designed an 8086 replacement without too much difficulty.

The standard text is "Bit Slice Microprocessor Design" by Mick and Brick

https://www.alibris.com/booksearch?keyword=bit+slice+microprocessor+design

Extra credit for writing a meta-assembler for defining the microcode and filling in the very wide ROM word.  Usually, every control signal, anywhere in the machine, has a bit  position in the microcode word.  That's why they get very wide, very fast.

Note that the LC-3 project I referenced above uses a microcoded design and the word is about 35 bits wide.  Pretty narrow as microcode goes.

Even if you use discrete logic, I would still recommend a microcoded control unit.  It is so much easier to make changes (and additions) when the only thing that changes is some bit in a word.
 

Offline rstofer

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Re: modern TTL/Logic-gate/74xx
« Reply #15 on: October 07, 2019, 08:13:42 pm »
4. If you just hate VHDL, you should look at Verilog, which is not Ada like.
A strongly typed language, like VHDL, seems very helpful for newcomers.  If the code compiles, there is a good chance the hardware will run.  It isn't always true but it is true more often than not.  If the code doesn't work and there is a finite state machine involved, I am willing to bet that one of the output signals doesn't have a default value.  There are many painful reasons that I know this!  If there is even a hint that a latch has been created, there is an error in the code.  Pretty simple rule:  No latches allowed!

I have made several half-hearted attempts to understand Verilog and I just haven't caught on.  Of course, given that I know a bit about VHDL, I don't need to know anything about Verilog for my hobby projects.

What's to know?  You need to be able to write an equation for combinatorial logic.  Then add in a MUX and Demux, again combinatorial.  Add in a clocked register and use it as a counter.  Make a more complicated register process that accepts command inputs to load, clear or add 1.   Don't forget a NOP command because the register will be clocked on every rising edge but is not expected to change just willy-nilly.  This is a very useful construct for a program counter.

Now the big one:  Learn how to code a finite state machine including default values.  That's really about it.  Of course, the devil's in connecting these primitive gadgets together to make something useful.  But, really, there are only a few constructs used over and over.  Get it right once and then copy-and-paste (conceptually).

Really, once you have an FSA working, the rest is just details.  Some FSAs will be quite lengthy (like the LC-3 project, 64 states, some unused) others will have just a few states.  But the code is the same!  You have a clocked 'next state' process and a combinatorial process where the work gets done.  I don't prefer the single clocked process model for an FSA.

Find a project, see how it is coded and then just copy-and-paste!  It just isn't that difficult.  Get something to work and keep expanding.

OpenCores.org has a lot of projects.  Some simple, some complex.  Download something and look at it.

« Last Edit: October 07, 2019, 08:19:44 pm by rstofer »
 

Online ledtester

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Re: modern TTL/Logic-gate/74xx
« Reply #16 on: October 08, 2019, 02:53:19 am »
You can also just use EPROMS:


 

Offline hamster_nz

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Re: modern TTL/Logic-gate/74xx
« Reply #17 on: October 08, 2019, 03:40:30 am »
If I was to descend into such madness it would be with a reel of 74AHC1G79 and 74AHC1G00 (about US$0.10 and US$0.07 each in qty 1,000), on two layer boards.

Would probably do 95mm x 95mm PCBs (if I could find a suitable way to mount them) to keep PCB costs down. I would have a generic PCB with footprints but flying wires for prototyping, and as design settles down / is tested then move to custom PCBs. The PCBs would always have a few spare footprints for bodges, of course.

Have no idea how I would do a backplane. A generic PCB design to hold connectors and supply power, and then use point-to-point wiring?


https://assets.nexperia.com/documents/data-sheet/74AHC_AHCT1G79.pdf

https://assets.nexperia.com/documents/data-sheet/74AHC_AHCT1G00.pdf

... however, you can bet that I would use a S/W tool to simulate everything first, and then possibly layout the PCBs, or at least generate a netlist file for KiCad.

And go full agile with a CD/CI pipeline..  ;)
« Last Edit: October 08, 2019, 03:45:23 am by hamster_nz »
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Offline ker2xTopic starter

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Re: modern TTL/Logic-gate/74xx
« Reply #18 on: October 08, 2019, 05:59:58 am »
Thank you all for the answers !  :-+

@hamster_nz : While it's technically possible to use only NAND gate, i will not descend that deep into madness. I'm planning to use all kind of gates. About agile, i wasn't aware that it was also a thing in electronic, i'll take a look.

@ledtester : yes, i did mention using eeprom (but it would be a totally different project that originally planned)

@rstofer : i don't want to use FPGA for this. i may end up using one, but if i do it will be for the non-cpu part of the computer. and my original plan is to use a microcontroller for this, not an FPGA.

@rstofer : i never heard about AM2900. But it seems to be very old. I want to use part that are still in production and usable by a PCB company for their pick & place machine.

@magic : sorry, my answer was a bit confusing and forgot to mention that i did indeed understood that you wrote "74HC", i'll take a look at LVC too.

@edavid : yes, i know this webring, i love it. I'll take a look again at CPLD. For me it was just an underpowered cheaper FPGA but it looks like i misunderstood.

@rstofer : yes, i have a few books. i have a scan of "digital computer electronics" (it's a 70's book). I'll take a look at the other book you suggested. I don't know about the ibm 1130. But i'm a big fan of the IBM 7090, i have a the emulator installed and i wrote some Fortran II code for it. I *almost* considered rewriting an emulator for it but gave up on the idea since i already have a working emulator (in Delphi ...) so i gave up on the idea. It's such a massive beast ... And everything is in BCD, not a big fan.
often times... there are other approaches which are kinda crappy until you put them in the context of parallel machines
 

Offline james_s

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Re: modern TTL/Logic-gate/74xx
« Reply #19 on: October 08, 2019, 06:07:11 am »
If you don't like VHDL you could try the other popular HDL, Verilog. I'm not aware of much in the way of complex logic chips that are around anymore, 74xx is still handy now and then for a few gates or a counter but for anything more complex everyone just uses CPLDs or FPGAs. I started doing FPGA development several years ago and while it took me a while to get over the initial learning curve I don't find it all that hard now. The difficult part is designing the logic, describing it in VHDL is straightforward.
 

Offline ker2xTopic starter

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Re: modern TTL/Logic-gate/74xx
« Reply #20 on: October 08, 2019, 06:41:40 am »
I'll address this whole FPGA issue :

I could do it if i really wanted to and *had* to do it. I write fortran (and other languages) as a hobby. I write SQL as part of my job. I obviously can do ASM too. (since i'm designing a cpu and emulator in software).
I could do VHDL/Verilog. i just don't want to, don't wanna, nope, no way, eww, poop.

Doing it with an FPGA would be like writing a emulator in a language i hate. And i'm already busy writing one in a language i love.  :-//

And how am i supposed to fail in electronic if all i have to do is to buy an FPGA dev board and write code ?

It's not 100% out of the way. I may end up using one despite my best effort to avoid it. But if i do :
- it will be for the non-cpu part of the computer
- it will be because using a microcontroller for the non-cpu part of the computer didn't work the way i expected for unforeseeable reasons.
- it will be because i couldn't test a submodule of the cpu with the microcontroller.
- it will be because i want to. As of today : i don't.

I will take a look at (C)PLD however, because i apparently misunderstood what it was.
Later, because i just watched the clock and i was supposed to be at work 12mn ago. oops.  :rant:
often times... there are other approaches which are kinda crappy until you put them in the context of parallel machines
 

Offline hamster_nz

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Re: modern TTL/Logic-gate/74xx
« Reply #21 on: October 08, 2019, 06:55:27 am »
The agile snark was a bit of a joke... Everything is going 'agile' .

But it could actually be possible to do, as you will have quite a few mundane tasks that could be automated along the way from design to hardware.
Gaze not into the abyss, lest you become recognized as an abyss domain expert, and they expect you keep gazing into the damn thing.
 

Offline rstofer

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Re: modern TTL/Logic-gate/74xx
« Reply #22 on: October 08, 2019, 03:26:44 pm »
There's another way to architect an FPGA CPU that is almost never seen in the wild:  Build up a library of 74xx(x) blocks.  Then 'wire' the blocks together just like you would do it on a wire-wrap board.  Build modules for 7400, 7402, 7404, 7408, 7474, 74181, 74182 and all the others that come up.  This is a terrific way to use logic chips as the design elements rather than more conventional FSAs and the other constructs.  It would be a very interesting design!  Elegant and unique!

You can design the 74181 block in behavioral code (specify the inputs, outputs and function) or model it with lower level logic chips from the datasheet block diagram.  I might do that in a later pass but behavioral code would be my first choice.  But it would be as simple as substituting one file for another and recompiling to change to the more detailed design.

I would still lay out a microcode word and use microcode for the control unit.  Among other things, the typical large FSA isn't needed and although we know that, in the end, the FSA will look a lot like a microcoded solution, one big difference is that the FSA will probably use 'one-hot' encoding so an FSA with 100 states will have a 'state' and 'next_state' vector width of 100 bits.  We don't want that for our microcode word width so many fields will be encoded like MUX select bits.  Three bits select 1 of 8 mutually exclusive values rather than having 8 signals going to AND gates.

In real hardware, it is common to use tri-state bus drivers to send signals from registers to some bus.  This doesn't tend to work very well for FPGAs so we have to implement MUXes.  Turns out the synthesis tool will do that by magic if you try to define tri-state drivers.

Everything that needs to happen and the sequence of events is contained in microcode.

Not too many people remember but IBM invented the 8" floppy.  Why?  To load the microcode for the IBM360.
https://en.wikipedia.org/wiki/History_of_the_floppy_disk

For the meta-assembler, and you would probably need one, you define a word width.  Then you define 'fields' within the word (or define the word as a collection of fields).  Perhaps 3 bits are allocated to the selection input to an 8 input MUX, something like that.  Further, you define default values for each field so that each line of microcode doesn't have to define every field, many of which are not involved with the current operation.

Each line of 'code' defines values for the fields at a particular memory location in the microcode.  Extra credit for macros.   Maybe use the C preprocessor?  There's a simple Python program in here, screaming to get out!  But, really, it simply MUST be written in Fortran.  Characters and strings are such a PITA for Fortran!  We had to rewrite IBM's Commercial Subroutine Package for the IBM1130 to get some speed out of business applications, circa 1970, and the main thrust was string manipulation.

In the end, you wind up defining every bit in every word in the microcode store.

Now, the microcode wants to be alterable and not totally compiled in to the VHDL.  Hit up hamster_nz for his code on reading BlockRAM values from a hex file during the Implementation phase rather than way back at Synthesis.  I don't recall where I found it but I used it for my LC-3 project.

Extra credit if you use an SD card to hold the microcode and can come up with a simple way to read the file during boot.  Heck, IBM did it way back in the late '60s.

ETA:  Once you have the FPGA version working, it would be pretty trivial to use the same blocks to design/build real hardware.  Think of the FPGA as a high end simulation.



« Last Edit: October 08, 2019, 03:46:52 pm by rstofer »
 

Offline rstofer

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Re: modern TTL/Logic-gate/74xx
« Reply #23 on: October 08, 2019, 04:08:41 pm »
And how am i supposed to fail in electronic if all i have to do is to buy an FPGA dev board and write code ?

It is common for programmers of procedural code to look at Verilog and VHDL as just another language.  It is, and it isn't.  Yes, they are both languages but...  They're describing hardware, massively parallel hardware!

Eventually the programmers come to realize that every single line of code in a 10,000 line project is executing in parallel.  Signals 3 levels deeper are still changing state, massive things are happening on each clock pulse.  Just handing data off from one module to another has timing implications if the processes are clocked (one clock delay is typical, sometimes 2 if crossing a clock domain).  It is up to the designer to keep track of the timing of every signal in the design.  In bits and pieces, true, but everything is happening in parallel.

There is nothing in the world of procedural code that comes anywhere near to being as massively parallel as writing in an HDL.  What ?  A CPU has 4 cores and 2 threads per core?  8 things going on at a time?  That's trivial!  In HDL I can have thousands of independent processes all running in parallel, happily moving information from place to place.  Got FreeRTOS running?  Great!  But it's still just serializing.

Hardware design is the ultimate game!  But sometimes it just isn't practical to build things with discrete chips.  My personal limit for wire-wrapping is about 100 chips, a very modest CPU depending on how the registers are implemented.  That's a LOT of chips but beyond that point my attention span falters.  My scratched out logic designs just aren't formal enough.  Documentation becomes more important than wire-wrap and it becomes more work than play.
 

Offline ker2xTopic starter

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Re: modern TTL/Logic-gate/74xx
« Reply #24 on: October 08, 2019, 04:11:26 pm »
FPGA again ? 

... ok, ok. you guys win, i'll consider it. :-//
And i kinda like the idea of implementing the whole serie of 74xx, just for the fun of it.
Even if i'm not really sure if it make sense, but common sense doesn't matter in this kind of project  ^-^
I think i need a drink. cheers !  :popcorn:
often times... there are other approaches which are kinda crappy until you put them in the context of parallel machines
 


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