Electronics > Beginners

Multiple LL N-Channel MOSFET's in Series

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T3sl4co1l:
Okay, yeah... comparators and other control logic stuff, do it at low voltage.  Add level shifters into and out of the block.  So, a 100V buck converter made with a discrete controller, use a bootstrap gate driver.

I tend to reach for LM393 (5-30V) or MCP6562 (2.7-5V) for jellybean comparators.

Tim

TheDood:
Hey guys back with more questions  :-//

Can someone look over this block diagram and help me confirm my understanding or correct it? Thanks in advance..

Trying to reduce power dissipation in the rectification part of PS cct, so I can isolate effeciency loss to the regulation part. In terms of total efficiency is the power required by the op amp offsetting any localized effeciency gain noticed in a reduced diode turn on time?

If I'm using opamps to slam diode on fast, am I using less power? Or am I just turning diode on faster, or both?  There's still a V drop across diode, its just that the op amp is facilitating the V needed so that the load V isn't disturbed?

T3sl4co1l:
What's the opamp powered from?

What about the voltage drop in the opamp output stage?

Tim

TheDood:
Thanks for the reply Tim, you've been very helpful.

C1

Depending on the load, I would have to add or remove R's, my thought was perhaps a 5V-10V max op amp output?


The V drop across the diode? Or I'm not sure I'm comprehending? To me it seems the OP amp turns the diode on, but that there's still a 0.7V drop across it, what I'm trying to understand, is, P=V*I, so really, I'm not gaining any in effeciency turning the diode on quicker because the load current is still flowing through a 0.7V drop regardless the origin of the voltage (turned on diode is like (loadV + 0.7V), still flowing same current just a bit more V to calculate power dissipation from)? Also, because barely no current flows in an OP amp (right?), how much power are they consuming, generating? Is this offsetting any effeciency (if I happen to not be comprehending the power dissipation across diode correctly)? 

If I were to switch schottkys out for FETs, so that the load current doesn't get dropped by 0.7V, just by the RDSon of the FET (assuming current produces less V drop than 0.7V), would that increase effeciency?

For calculations let's assume a 30VAC supply.

T3sl4co1l:
Just that the op-amp powered from a "sky hook" is the electronic version of the mechanical beginner's shaft passer.

The crux of it is this: it's easy to forget that the op-amp is itself made of transistors.  It cannot generate more voltage than supplied with; the full load current (plus a little extra!) is drawn from those supplies; and the full voltage difference between supply and output is burned as power dissipation.

Op-amp input pin current is pretty low, right, but the output current has to come from somewhere.

So, making a synchronous or precision rectifier, with op-amps, and expecting any efficiency out of it, is a fairly early and simple mistake to make. :)

Once this is realized, it's easy to see why this can never work, but also that one must explore circuits a bit more clever to actually implement it.


So... not to beat you to death about it, just to be perfectly clear what it is, and that we've all been there at some point. :P

Using transistors is indeed one such case; they must be controlled to turn on and off at the appropriate voltages/currents, but one should also be careful not to slam them on and off (e.g. using a comparator and gate driver), because that will lead to oscillation and ugly recovery* effects!  A modest gain factor, between Vds and Vgs, is probably best.

*Recovery is effectively the time a diode needs to "decide" when being turned on or off.  There is forward and reverse recovery.  Forward recovery is a relatively high forward voltage drop, for the first however many, usually nanoseconds, as the forward current rises to reach its nominal value; this manifests effectively as a series inductance (higher dI/dt --> shorter t_fr, higher peak V_fr).  Forward recovery usually isn't very substantial.

Reverse recovery is the time taken for the current to go through zero, to some negative peak I_rr, during which time the voltage drop remains near Vf; this manifests effectively as a parallel capacitance (higher dV/dt --> shorter t_rr, higher peak I_rr).

Diagrams of reverse recovery and more discussion can be found here: https://www.allaboutcircuits.com/technical-articles/switching-losses-effects-on-semiconductors/

In an emulated or active diode like we're discussing here, the recovery is determined by the speed of the op-amp and transistors.

Here's a fairly simple example as a single diode, although, I guess I don't know how explanatory it will be since it uses a handful of BJTs -- I may be inviting something more complicated than you're prepared for..?  Explanation below:



The leftmost transistor is used as an inverted* diode (base strapped to emitter).  This is done for two reasons: one, the forward voltage drop matches that of the next transistor; two, the breakdown voltage is higher (about Vceo, say 60V for 2N3904).  The second transistor is also inverted, in a common-emitter configuration (except the collector is common, because inverted; but again, it works the same way!), so if the "Cathode" voltage is high, the first diode is reverse biased and the 470 ohm resistor turns on this transistor, pulling its output (the schematic emitter) down towards ground.

*BJTs are always introduced like a Tetris piece, a stack of N-P-N or P-N-P blocks.  But this is really pretty disingenuous as to how they work, or are made.  Well, most BJTs aren't symmetrical, one end is made stronger than the other, giving that side has a lower voltage rating (typically 2-10V) than the other (typically 20-100V+), but also better "emission" of electrons/holes into the transistor, hence it's called the "emitter" and is typically used as the common (grounded / reference) terminal.  It still works just transistorly if we swap E and C -- but, the performance is very different, hFE(inv) typically being quite low, under 5 say.  So that will be one drawback that applies here.

The PNP and three other resistors is a simple current source, about 0.6mA.  This biases the second transistor, giving it voltage gain and a working range of about 0-5V.

Finally the two rightmost transistors are a complementary emitter follower; they boost the gain node's output current from ~0.6mA to >60mA.  This is able to drive the MOSFET gate reasonably quickly.  The follower is not biased, which is kind of unfortunate (this introduces another nonlinearity, probably making this circuit awkward to use on arbitrary AC waveforms, say), but probably not worth addressing when used with most power circuits (like mains or switching supply rectification).

So, conversely, when the "Cathode" voltage dips negative, the first transistor turns on, shunting current away from the second one, turning it off, and allowing the gate voltage to rise.  This limits the FET voltage drop (Vds) to perhaps -60mV at low currents (the "decision range" is driven by the BJT's exponential gain, so a few multiples of 26mV goes from reasonably-fully-on to reasonably-fully-off), and I_load * Rds(on) at higher currents.

Two or three major downsides to this circuit are: the supply requirement (5V referenced to "Anode"); the relatively high bias requirement (mainly the 470 ohm resistor, or ~11mA; this is due to the low hFE(inv)); and probably the switching speed, say for switching supply application (this will take some 100s of ns, which is worse than a high speed PN diode, and despite the lower voltage drop, it may not turn out to perform better than a schottky diode).  For mains rectification it would be okay, but the first two issues are still unfortunate.

Note another characteristic of this: the transistors act as an amplifier, with a limited output voltage range -- 0-5V.  The input might be 40V.  It's not enough to have a gain function here: there also must be a limiting function.  If we used an ideal op-amp (one with a true skyhook for supplies!) to set Vgs = Vds * -100 say, we'd end up applying a tremendous voltage to the gate, blowing it in no time.  We need a limited output, so Vgs remains in a reasonable range.

Also, since it's a 5V supply, we would want to use a logic-level FET, which is fine, they're plentiful. :)  The supply can of course be increased to use others, but the bias current will be even more annoying then, and a better solution would be attractive.


There are of course ICs for this; LT for instance makes one, if you don't mind paying for it of course: https://www.analog.com/media/en/technical-documentation/data-sheets/4320fb.pdf
Which, despite the multi-dollar price tag, is really a pretty good deal when you're tight on space and can't afford the heatsinks or the temp rise (let alone the raw efficiency points) of a passive (diode) solution.  The knock-on savings are heatsinks, mounting hardware, fans, all those sorts of things.

Tim

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