@Tim (and others)
So I've tried to comprehend what you're telling me but still not quite there.
What I've got so far:
Op-Amp output is limited to OP-Amp PS.
OP-Amp dissipation = deltaV between input & output
Current flow through a diode when turning off is somewhat like an inelastic collision, its almost like the current bounces off the diode, these elastic type of reactions are described as forward and reverse recovery characteristics?
The duration of the recovery times is dependent on the amount of charge stored in the depletion zone and/or N-P boundary?
Some more questions:
If the op amp is in an essentially open loop gain configuration, the only power loss is the Vf of the diode between output pin and inverting input pin, right(?), but at what current? Is the current dependent on the diode or the op-amp? When you said the current has to come from somewhere were you saying that a decent portion of the load current flows through the OP-Amp output pin, or is it only the corresponding current of the diode at its Vf (if op-amp PS were limited to diode Vf)?
Trying to understand where the greatest power losses come from, attached are (2) MOSFET recovery charts, 1 on, 1 off. Are we mainly concerned with the time duration it takes to complete the switching action (refer to chart)?
Also, it looks like the efficiency plateau's around 92%? This is a generalized graph? The efficiency would be dependent on RDSon and the speed that Vds is changed? Not all FETs would plateau here? At 1kHz there'd be an even greater efficiency, albeit not much greater?
As far as the schematic, I get the inverted diode config, but that's about it. Trying to understand it more but having difficulty visualizing the current path when cathode is +V and when cathode is -V.
Also, why not just use 1 transistor with a 1kΩ on the base instead of the cascading triplet?
When cathode is +5V, the MOSFET is turned on with ~5V @ gate, but when cathode <5V, the inverted diodes begin to turn on and bypass of the MOSFET gate which begins to close MOSFET. It seems that this cct doesn't slam MOSFET on & off? It almost seems like the inverted diodes or load line feedback is buffering the speed of the switching? Gate V goes from 0V to 5V but dependent on how fast load V is transitioning between 0V and 5V?