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Multiple uCs/GPIO devices to single mosfet gate; Goal to shut down RPi cleanly

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mortrek:

--- Quote from: T3sl4co1l on November 18, 2019, 04:10:02 pm ---Absolutely.  Put a R-S latch on the gate.  MCU sets it, it stays on.  rPi comes up, its output stays inactive, it doesn't need to do anything.  When shutdown occurs, it resets the latch, turning itself off.

Tim

--- End quote ---

This seems like a great idea. It won't cause any other problems to use one as the gate driver, with two different devices connected to SET and RESET? All devices are run from batteries. I've used N-MOSFETs so far with no trouble in a similar configuration, just not with two inputs.Do they even make single R-S latches or are they all quad?

T3sl4co1l:
If nothing else you can use a 74HC2G02 or the like to construct the latch.  A pair of transistors (or a few more) can do it as well, or even using the active transistor as part, depending on how much bias current and layout area you can afford.

Tim

Ian.M:


--- Quote from: mortrek on November 18, 2019, 05:20:49 pm ---Do you see any issues with the RPi communicating with the uC to tell it when to shut it off? Of course the logic levels are different, but that can be fixed with a logic level converter or voltage divider or whatever I imagine. I'd like to keep this as simple as possible from a circuit and component level.

--- End quote ---
It depends on the 5V uC's input thresholds - if they are TTL compatible you can drive it direct from 3.3V logic like the Pi GPIOs, but if they are normal CMOS thresholds, logic '1' will be marginal and you'll need a level shifter for reliability.  I favour 74LVC1T45 single gate and '2T45 dual gate bidirectional buffers for that because they can handle any logic levels between below 1.8V and 5.5V, have decent drive capabilities and are guaranteed to tristate on partial power-down.  Strap the direction pin high or low as required when you only need single direction logic level translation.

Beware of any 5V level logic signals going to Pi GPIOs.  You can use potential dividers for downwards level shifting, but they are power hungry if the usual state is logic '1', so it may be worth using a proper level translator.

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