First of all, nobody uses TTL, so purge that from your memory.

Fortunately, CMOS has been around just as long, so that should be just as familiar to you, no?

And, just as 74HC is faster than CD4000, 74LVC is faster still, and 74ABT, and so on as you go down in scale. And as the logic families have gone, contemporary ASICs have even better performance thanks to no requirement to drive pins at every stage. As you go down in scale, the transistors get smaller, the currents get smaller, and the voltages go down too. Higher doping is needed for thinner junctions, which limits supply voltage; gate leakage in ever-thinner gates is also an issue (high voltages across a transistor give hot carrier injection -- that's how EPROMs are programmed).
So, it's typical to have low voltages (0.9 to 1.5V) for core logic, which has internal level shifting to a higher IO bank voltage (2.5 to 5V?) which in turn interfaces with the outside world.
Why hasn't board-level logic dropped much below 3.3V? Probably because there's still just so damn much that's TTL compatible, still out there. 3.3V CMOS is basically 5V TTL. You can drive MOSFETs (some) and LEDs directly. And pretty much everything else is TTL-compatible, say if you're adding a PHY or level translator or what have you. Going lower in voltage invites more noise sensitivity; 3V CMOS has about 1V of noise immunity, which isn't nearly enough for sending over a cable, but it's also not the tiny margin you'd have with 1V logic.
And, that said, there are plenty of lower-voltage logic families available: a few types of ECL, LVDS, CML... Some are used in cable-level signalling applications, like USB High Speed, or HDMI. Notice these are all differential in some way or another, a necessity in the presence of real world noise levels.
Tim