My first DC/DC Buck-Converter PCB

[Hendrik]

Hello everyone,

as someone who has never touched a CAD software and is rarely hands on with schematics I was tasked to design a DC/DC Buck Converter for an university project.

We are building a hydroponic plant-growbox with sensors, waterpumps, esp32, ... For this we need multiple power rails stepped down from a 12V power supply.

My current idea is to place three of the modules onto a mainpcb next to each other (stacking pcb) and forward the 12v input from one of the modules via Pin Header J2 and J4 to the other modules. This in combination with the correct value resistors for the feedback-loop would give me my wanted voltage on J3... right?

I have chosen this IC (AOZ1016AI): https://datasheet.lcsc.com/lcsc/1809191913_Alpha---Omega-Semicon-AOZ1016AI_C41768.pdf read everything multiple times and tried hard to implement it correctly (I tried to follow the typical application schematic and pcb layout example as close as possible (attachment 3)).

Mainly I would like to know if anyone sees any major blunders as it may be totally obvious to an experienced person. Some more specific questions as bullet points:
 - The datasheet PCB Layout example connects the AGND with PGND on the negative side of the input capacitor C1. I connect it with a Via just from the AGND plane to the PGND plane which covers the whole backlayer. Does it matter?
 - Do I have to worry about switching noise with 3 of these modules working? (All on seperate pcb's, the esp32 and sensors will be on the mainpcb and are connected through the pin header J3





Thank you for reading this mess of a post!

Best regards,

Hendrik

[sapien]

You probably want to iterate your design. Simply keep iterating, untill you think you've really done a good job, of at least these points:
-Keep high power loops small
-Keep the switching node small (LX)
-Keep high power traces as wide and short as possible
-Stick to the datasheet recommendations (split PGND and AGND, and really only combine them at the C1 GND, because yes, the GND's of your circuit do matter)
-Try to avoid via's for power paths

A tip: start with the power paths: allign C1, C4, the IC, L1, C3 in a neatly packed row. Connect their positives and PGND's with thick short traces, in the same plane. From there try to see how to fit everything else.

Iterate, and upload the updated PCB

[mariush]

oh boy ...

aoz1016 has the status obsolete .... I'd avoid such parts from the start, no guarantee you'd still have access to them.

I'd pick a dc-dc converter chip that doesn't require compensation parts, these days there's plenty of those available. Also, I'd pick a regulator that uses a footprint identical to other in the series (ex a cheaper 2A one, or a more expensive 3A or 5A one in case the 2A version is out of stock)

For example AP63300 from Diodes Inc is 3.2v .. 32v 3A 500kHz step-down regulator, and it's in stock at Digikey and also at LCSC :
Digikey : https://www.digikey.com/en/products/detail/diodes-incorporated/AP63300WU-7/10491510
LCSC : https://lcsc.com/search?q=ap63300

Doesn't need compensation ... and has same footprint as AP63301

But if you don't mind adding the compensation parts, you have active parts like AOZ1284, AOZ1283 same footprint just different current rating (2.5A vs 4A)

On your schematic / pcb : 

what's with the weird J4 and J2 ... don't break the thick trace with the ground through hole ... rotate the J2 so that ground is below. rotate J4 so that ground is up. You can have a thick trace going directly from the thick trace at the top to the Vin of the barrel jack.
rotate C1 180 degrees to have the positive towards the thick trace and have the ground at the bottom

better yet, maybe revisit the whole idea of J2 and J4, the pins are only good for around 1-2A and just two wouldn't be reliable, board on top could move around.. you'd want at least 4 pins.

You're using that footprint for C1 and C3 ... those are often electrolytic capacitors. You have through holes for the jumpers so unless you make those jumpers surface mount as well, you could use through hole footprints for the capacitors.
Use polymer (solid) capacitor, or quality electrolytic (low esr)... you'll want the voltage rating of the input capacitor to be a bit higher than max voltage... ex if your input's gonna be 12v, 16v rated may be fine, but go for 25v polymer/electrolytic just to be safe... and if you use electrolytic you'll want to use higher capacitance to get much lower esr (ex maybe 100uF and up)


On C3 ... A single electrolytic capacitor on output will not work. You may need to go with a higher capacitance polymer if you choose that. The regulator datasheet and the example circuit mentions ceramic capacitors ... you need polymer (solid) capacitor or a couple of ceramic capacitors.  Keep in mind that with ceramic capacitors, you don't get that capacitance at any voltage, the higher the output voltage the higher the voltage rating on your ceramic capacitors should be.
If you're gonna have 3.3v out, then a 22uF 16v rated X5R may actually be only 15uF or something like that.

I'd suggest placing a footprint  or two for ceramic capacitors (0805 should be fine, as you'd be able to solder 1206 on it as well) and a through hole footprint and then you'll see if you go with ceramics AND/OR with polymer or electrolytic.  You could try and see how it works with a 10uF ceramic in parallel with a low esr 100uF electrolytic capacitor for example.

I'd make the loop much  much smaller ( U1 - L1 - C3 )  For example on your circuit board, move R1 and C2 to the right  to allow U1 to go down, and that would allow you to rotate L1 90 degrees to the left  so that the Vout part goes directly towards the thick output voltage trace .... right next to it, put the footprints for the ceramic capacitor(s)  and a fooprint for a through hole polymer capacitor

You could have ground pad under the chip and connect the ground there.  Note though if you check those AOZ1284 or AOZ1283 the pad has to go to Vin... 

Consider having a header with a jumper or something like a surface mounted resistor footprint instead of connecting EN directly to ground under the chip.  you can solder a 0 ohm resistor or a piece of wire or put a solder blob if you don't need it, but you could have a header or something to enable the regulators from another circuit board. Worst case scenario it's just a couple extra solder points for a wire connection, can't hurt much.
It may also be a good thing if you decide to change the chip to another one with same pin order, but where enable has to be connected to voltage instead of ground to turn on, or it's floating to enable.

[Hendrik]

Thank you both very much for your input, that was a whole lot to digest.
After some iterating this is my current layout:



In general I squished everything together, shortening the board by a centimeter.

Both layers are filled with ground planes as recommended in the datasheet.

Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.

 One thing I overread was:

A ground plane is preferred. If a ground plane is not
used, separate PGND from AGND and connect
them only at one point to avoid the PGND pin noise
coupling to the AGND pin. In this case, a decoupling
capacitor should be connected between VIN and
AGND.

Meaning I could just connect everything together with a big ground plane (leading to the current iteration)? Does the decoupling capacitor C4 in that case do any harm if I just leave it there (as it would not be required when both grounds aren't just connected at one single point... if I read the datasheet correct)?

aoz1016 has the status obsolete .... I'd avoid such parts from the start, no guarantee you'd still have access to them.

Oh my bad. I didn't notice for this IC. With other IC's from this manufacturer I found that they update the datasheet to lead to newer IC's, but not for this one. Nonetheless I already ordered 10 of those for personal use and just planned to use them in this project. There won't ever be the need for more of these IC's as this project will most likely be running a couple of months at most.

On your schematic / pcb :
...

Since I already moved a whole lot around most of the placement tips I already had incorporated. But the tip with the 90° turned L1 works pretty good I guess.

You're using that footprint for C1 and C3 ... those are often electrolytic capacitors. You have through holes for the jumpers so unless you make those jumpers surface mount as well, you could use through hole footprints for the capacitors.
Use polymer (solid) capacitor, or quality electrolytic (low esr)... you'll want the voltage rating of the input capacitor to be a bit higher than max voltage... ex if your input's gonna be 12v, 16v rated may be fine, but go for 25v polymer/electrolytic just to be safe... and if you use electrolytic you'll want to use higher capacitance to get much lower esr (ex maybe 100uF and up)

I had these solid caps in mind for the input and output capacitor:
https://lcsc.com/product-detail/Solid-Capacitors_Lelon-OCV220M1VTR-0606_C473426.html
As the 35V rating should be way more than enough and they claimed "ultra low ESR". They also have the recommended capacitance of 22uF. Also I am pretty sure that this the correct footprint for the 6,3mm SMD cap.

Thank you again very much for the input and sorry for my delayed response!

Best regards,

Hendrik

[mariush]

Design wise... not cool to have all that ground fill at the output capacitor be connected to everything else just through that GDNA pin.
Maybe route the trace on the bottom of the PCB along the edge of the board, with a few mm of spacing away from the mounting hole (don't want a screw to scrape the silkscreen and short the trace to ground) . This way the ground would not be separated in that island.

Still feel it would be a good idea to have a footprint for a ceramic capacitor in parallel with the output capacitor. You can just leave it unpopulated if you test and determine it's not needed.
If the output capacitor is genuine (see comments below) it's still around 50 mOhm ESR which is very low but not very low compared to ceramic capacitors.
Look over the formulas in the datasheet for that 1016 chip and see how low ESR they prefer.  Considering the chip runs at 500 kHz a ceramic capacitor in parallel should only help.
Also, I don't think you have to stick to 22uF, I think the 22uF was just some sane, minimum, reasonable value.

If I had to choose something surface mount, I'd probably go with a 47uF 25v Panasonic SVPF : https://lcsc.com/product-detail/Solid-Capacitors_PANASONIC-25SVPF47M_C136280.html
The English datasheet is at page 96 in the catalogue : https://api.pim.na.industrial.panasonic.com/file_stream/main/fileversion/244764

25v should work for output, as you'll most likely have less than the 12v input, so a 25v rated capacitor should be fine.  The above one is rated for 30mOhm at 100-300kHz.

I had these solid caps in mind for the input and output capacitor:
https://lcsc.com/product-detail/Solid-Capacitors_Lelon-OCV220M1VTR-0606_C473426.html
As the 35V rating should be way more than enough and they claimed "ultra low ESR". They also have the recommended capacitance of 22uF. Also I am pretty sure that this the correct footprint for the 6,3mm SMD cap.

Yeah ... really comforting when the datasheet doesn't even list 22uF 35v for this series. They only list 39uF and 68uF in 8 or 10mm packages.
Even in the catalogue on Lelon website there's no such capacitor : http://www.lelon.com.tw/upload/guides/2023%20Capacitor%20Catalog20221020152530.pdf

Maybe it's genuine, I don't know.

[Hendrik]

Design wise... not cool to have all that ground fill at the output capacitor be connected to everything else just through that GDNA pin.
Maybe route the trace on the bottom of the PCB along the edge of the board, with a few mm of spacing away from the mounting hole (don't want a screw to scrape the silkscreen and short the trace to ground) . This way the ground would not be separated in that island.

I'm sorry I see the problem here but I don't quite understand how you would trace it.
I have made an attempt to fix it with following:



The board has shrunken a bit again, now the ground planes make a good connection everywhere.
I've combined the 3pin output header and the 2pin 12v passthrough into a single 5pin header.
Could there be any problem with a 12v pin and maybe a 3.3v pin closeish (2pin space) together?

Still feel it would be a good idea to have a footprint for a ceramic capacitor in parallel with the output capacitor. You can just leave it unpopulated if you test and determine it's not needed.
If the output capacitor is genuine (see comments below) it's still around 50 mOhm ESR which is very low but not very low compared to ceramic capacitors.
Look over the formulas in the datasheet for that 1016 chip and see how low ESR they prefer.  Considering the chip runs at 500 kHz a ceramic capacitor in parallel should only help.

I've added the second capacitor in parallel with the output capacitor.

Also, I don't think you have to stick to 22uF, I think the 22uF was just some sane, minimum, reasonable value.

If I had to choose something surface mount, I'd probably go with a 47uF 25v Panasonic SVPF : https://lcsc.com/product-detail/Solid-Capacitors_PANASONIC-25SVPF47M_C136280.html
The English datasheet is at page 96 in the catalogue : https://api.pim.na.industrial.panasonic.com/file_stream/main/fileversion/244764

25v should work for output, as you'll most likely have less than the 12v input, so a 25v rated capacitor should be fine.  The above one is rated for 30mOhm at 100-300kHz.

Thank you for the recommendation, I've added them to the basket.

I had these solid caps in mind for the input and output capacitor:
https://lcsc.com/product-detail/Solid-Capacitors_Lelon-OCV220M1VTR-0606_C473426.html
As the 35V rating should be way more than enough and they claimed "ultra low ESR". They also have the recommended capacitance of 22uF. Also I am pretty sure that this the correct footprint for the 6,3mm SMD cap.

Yeah ... really comforting when the datasheet doesn't even list 22uF 35v for this series. They only list 39uF and 68uF in 8 or 10mm packages.
Even in the catalogue on Lelon website there's no such capacitor : http://www.lelon.com.tw/upload/guides/2023%20Capacitor%20Catalog20221020152530.pdf

Maybe it's genuine, I don't know.

That also seemed quite suspicious to me but I thought it was just me being dumb.
I've already ordered a couple of those, but I will also order your mentioned Panasonic caps. There will be enough left over parts to assemble more than needed of these modules, so maybe I could make some tests and see if they perform.

Best regards,

Hendrik


Edit: I feel like I did the same thing again with the ground coming from agnd pin3 being an island, maybe not as bad as before, but no single plane connected on one layer. I will try to change this.

Here with the 5pin header scrapped and back to 2 and 3pin but with the new location.
I've added a trace at the bottom to connect the groundplane. Would the top connection of the ground plane suffice, or is this better?


Edit2: I will propably just move everything up a notch and have a proper ground connection at the bottom. Also I will move the cap C5 closer to C3.

Edit3: Okay this is where I am currently at:


I think the trace on the backlayer from the mcu is a good compromise, since this is not a high voltage/current signal.
Is the copper plane for the inductor still big enough for sufficent thermals?
Thanks!


Edit4:
Quick update. As suggested I've split the input pin headers to 4 pins and added a second footprint for an output cap in parallel.
I also changed my inductor in mind, since I think that it was not suited for the application, leading to a footprint change.
Inductor: https://lcsc.com/product-detail/Power-Inductors_PANASONIC-ETQP3M4R7KVN_C412308.html
Might be overkill with the current rating, but everything else seemed good?
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