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| NAND outputs tied to ground |
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| wraper:
--- Quote from: David Hess on June 11, 2019, 03:33:46 pm --- --- Quote from: wraper on June 10, 2019, 04:27:59 pm --- --- Quote from: Andy Watson on June 10, 2019, 03:54:39 pm ---my guess would be that it's an attempt to lower the ground impedance to the substrate of the chip. --- End quote --- If they cared about impedance, they would connect multiple logic gates in parallel. Not attach 600 ohm load to the output of single gate. --- End quote --- No, Andy is right. They tied the inputs high and then tied the outputs to ground to lower the ESR and especially ESL of the ground connection which lowers the ground bounce. No matter how many gates are placed in parallel within a single package, the ESL of the ground and power connections limit performance. This was a big problem with Fast Advanced Schottky TTL and similar CMOS logic families; they never met their actual performance potential or sometimes specifications because of the inductance of their ground and power connections. --- End quote --- How this is supposed to help when there is no such thing on positive side? Making this on GND side only does not make much sense, especially when load is pulling output to the GND anyway. Not to say output mosfets have quite large RDS(ON) to make much difference. |
| Zero999:
Yes, the 74HCxx series have an on resistance of 38Ohms, which won't make much difference. I can see it making more of a difference with something really high speed, such as an FPGA though. |
| jmelson:
--- Quote from: JuanGg on June 10, 2019, 01:05:24 pm ---Attached is the schematic for the square wave generator from a Hameg HM604 scope. I was just taking a look when I noticed there are three NAND gates with their outputs tied to ground. --- End quote --- Actually there are THREE outputs tied to ground. I suspect this is a very inventive circuit. Pin 14 is connected to T41, They are using a feature that putting a low on the input of the gates causes it to pull current from pin 14 to the grounded outputs, and that pin 14 then feeds some circuit. Jon |
| David Hess:
--- Quote from: wraper on June 11, 2019, 04:15:41 pm ---How this is supposed to help when there is no such thing on positive side? Making this on GND side only does not make much sense, especially when load is pulling output to the GND anyway. Not to say output mosfets have quite large RDS(ON) to make much difference. --- End quote --- They could have done both power and ground but I assume they were only concerned with the ground lead inductance as the outputs were pulled low. It is common for only the performance of one edge to matter. --- Quote from: Zero999 on June 11, 2019, 04:33:18 pm ---Yes, the 74HCxx series have an on resistance of 38Ohms, which won't make much difference. I can see it making more of a difference with something really high speed, such as an FPGA though. --- End quote --- It is not the ESL [Update: I meant ESR] of the ground (or power) connection which matters; it is the parasitic inductance. And since the added connections to ground in this case each have the same series resistance as the output driver, they are still useful in lowering the inductance to ground. Later logic families moved the ground and power connections to the middle of the lead frame and eventually added multiple ground and power connections. But FAST and AC logic were plenty fast enough to have their performance limited and I suspect in critical applications such as this, HC logic was fast enough also or at least Hameg thought so. (1) (1) This is actually one of the disadvantages of fast CMOS logic families compared to fast bipolar logic. The constant current output characteristics of a bipolar transistor output stage yield a better ratio of rise/fall time to delay time. For equal delay time, the faster RC output characteristic of CMOS is makes it more sensitive to power supply impedance because of higher dI/dT. |
| wraper:
--- Quote from: jmelson on June 11, 2019, 06:51:17 pm --- --- Quote from: JuanGg on June 10, 2019, 01:05:24 pm ---Attached is the schematic for the square wave generator from a Hameg HM604 scope. I was just taking a look when I noticed there are three NAND gates with their outputs tied to ground. --- End quote --- Actually there are THREE outputs tied to ground. I suspect this is a very inventive circuit. Pin 14 is connected to T41, They are using a feature that putting a low on the input of the gates causes it to pull current from pin 14 to the grounded outputs, and that pin 14 then feeds some circuit. Jon --- End quote --- Do you really understand what you wrote? T41 simply works as vreg to power 74HC00. 3 gates just stay static all of the time, all of them are simply connected in parralel. There is nothing inventive about that. |
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