NMOS or NPN for inverting open drain signal, which is lower current?

[luke-p]

I have an open drain input with an 115200 baud serial line, these are the two options (resistor values are placeholder): or

I'd like to draw as little current from the +5V line as possible without distorting the signal but I'm not sure what the best choice is, a small signal mosfet like 2N7002H has very low gate capacitance so the rise time is probably acceptable with a 10k pull-up or even higher. The mosfet also doesn't need current to flow through the gate like the base of a BJT. I'm not sure how to calculate rise time for an NPN transistor?

I know some kind of schmitt trigger inverter would probably be the best solution but this is for an existing PCB with a SOT23 footprint.

[iMo]

For 115k2 both schematics should work fine, no need to calculate r/f times (the input capacitancies for small signal bipolar transistors are well below say 200pF incl Miller's parasitic cap).
PS: say 200pF*10k=2usecs

[Peabody]

Why is it necessary to involve the 5V rail at all?  Wouldn't the 2N7002 work at 3.3V G/S?  And the bipolar certainly would.

Do you absolutely have to have inversion?  If not, you could connect the mosfet source to the open collector, and the gate to the 3.3V rail.  Eliminate the pullup resistor entirely.

[David Hess]

The difference in current is somewhere between 0 and 500 microamps depending on the data pattern; they both draw the same current when the input is low.

I'm not sure how to calculate rise time for an NPN transistor?

The output capacitance determines the rise time, so the bipolar transistor is likely 5 times faster because of lower output capacitance, but in an RS-232 application it is irrelevant as both circuits are plenty fast.

[luke-p]

For 115k2 both schematics should work fine, no need to calculate r/f times (the input capacitancies for small signal bipolar transistors are well below say 200pF incl Miller's parasitic cap).
PS: say 200pF*10k=2usecs

Thanks, I guess for this application it doesn't matter that much. I'm sort of interested in the theory but don't really have time, I'll install pspice and try some stuff later.

Why is it necessary to involve the 5V rail at all?  Wouldn't the 2N7002 work at 3.3V G/S?  And the bipolar certainly would.

Do you absolutely have to have inversion?  If not, you could connect the mosfet source to the open collector, and the gate to the 3.3V rail.  Eliminate the pullup resistor entirely.

Good point about the 5V rail, but this is an existing board, all I'd like to change are the component values.

The output capacitance determines the rise time, so the bipolar transistor is likely 5 times faster because of lower output capacitance, but in an RS-232 application it is irrelevant as both circuits are plenty fast.

I may be misunderstanding but the output capacitance would affect the 3.3V signal right? I was worried about the delay of the gate being pulled high introducing timing errors but I just realised a few µs delay on every falling edge of the output doesn't matter at all because they don't compound.

[Zero999]

The difference in current is somewhere between 0 and 500 microamps depending on the data pattern; they both draw the same current when the input is low.

I'm not sure how to calculate rise time for an NPN transistor?

The output capacitance determines the rise time, so the bipolar transistor is likely 5 times faster because of lower output capacitance, but in an RS-232 application it is irrelevant as both circuits are plenty fast.

It depends on the device. A signal MOSFET such as 2SK1829 is comparable to small BJTs and it doesn't have any storage time.
https://docs.rs-online.com/3357/0900766b814b2fb8.pdf

[Terry Bites]

You can add a second transistor in a common base (sadly neglected but handy amplifier) configuration to boost the speed bog standard devices.

[David Hess]

I'm not sure how to calculate rise time for an NPN transistor?

The output capacitance determines the rise time, so the bipolar transistor is likely 5 times faster because of lower output capacitance, but in an RS-232 application it is irrelevant as both circuits are plenty fast.

It depends on the device. A signal MOSFET such as 2SK1829 is comparable to small BJTs and it doesn't have any storage time.
https://docs.rs-online.com/3357/0900766b814b2fb8.pdf

Even the 2SK1829 is slower, although I would worry more about availability.  Storage time can be removed with schottky diode baker clamp, or use a fast saturated switch, but for this application it will not matter.  Any of the options are sufficiently fast in all respects.

You can add a second transistor in a common base (sadly neglected but handy amplifier) configuration to boost the speed bog standard devices.

Hehe, you reinvented TTL.

[Nominal Animal]

this is for an existing PCB with a SOT23 footprint.

You could bodge a 74LVC1G14 in SOT25-5 (single Schmitt trigger inverter) in the SOT23-3 footprint for 2N7002H.  The two footprints have the same size, just a different number of pins,
       D      +   Y
    [SOT23]  [SOT25]
     G   S    * A -
so by shifting the SOT25 left by 0.95mm (half the distance between G and S) you get A=G (input) and Y=D (output, inverted).  -=S needs to be bridged (the pin is directly opposite to D, so very close to S), and you need to provide the VCC to the + pin, and you might even add a 100nF cap between + and - for supply noise induced in the VCC bodge wire.  * is not connected in the 74LVC1G14.

It is a bodge, but doable, I believe.  (This is the reason I like SOT23 and SOT25: small, but not so small you cannot bodge or dead-bug it.)

Personally, for open drain inputs and outputs, I prefer to use NXP NX138AK in SOT-23, like in this dual 12V PWM fan controller (where the tachometer output is two pulses per rotation with an open collector output with a pull-up to 12V, and PWM input is an open collector input at 25 kHz).  Simulating in KiCAD/ngspice indicates 125kHz yields very nice output using your nmos circuit.  The rise time I get with 10k pull-up to 3.3V is about 160ns; with a 4.7k pull-up to 3.3V, it halves to about 80ns.  I don't have suitable test equipment to actually measure it in real life, though.

[fourfathom]

You can add a second transistor in a common base (sadly neglected but handy amplifier) configuration to boost the speed bog standard devices.

What is D1 doing? (It's the 1N4148 between the common-base transistor emitter and ground)