Author Topic: Not sure how to read datasheet SN74HC595  (Read 889 times)

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Offline dsharp02

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Not sure how to read datasheet SN74HC595
« on: April 23, 2016, 02:01:05 am »

I'm trying to understand how to use the 74HC595 and I think I understand what I need to do.  Here is my understanding, please correct me if I'm wrong...

To shift a bit into the shift register:
1. Pull OE low.
2. Wait for a falling edge on SRCLK.
3. Set SER to the desired bit value.
4. Wait for the next falling edge on SRCLK.
5. Set RCLK high, and hold until a rising edge on SRCLK.

Does SRCLK have to run continuously if I'm not using the chip?  Or can I start pulsing SRCLK only when I need to use the chip.  Will stopping SRCLK clear the current output?

Also, I'm not sure I understand how to read section 7.6 Timing Requirements.

What are do the different parameters represent?

tpd - ?
tPHL - ?
tt - ?


Offline bson

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Re: Not sure how to read datasheet SN74HC595
« Reply #1 on: April 23, 2016, 04:36:30 am »
tpd = propagation delay time

/OE controls the outputs and if pulled high causes them to go into a high-impedance state.  Low, the outputs reflect the storage register.  If you don't need tri-state functionality just wire it to ground.
SRCLK moves the shift register one stop
RCLK copies the shift register to the storage register register

This permits you to clock in say 8 bits of serial data to be output together.  If RCLK and SRCLK weren't separate each SER bit clocked into the shift register would cause the outputs to change and you'd have spurious output changes, not all 8 bits changing at once.

You only run the clocks when you either want to clock in data (SRCLK) or output what's been shifted in (RCLK).

Here's how to use it:
1.  Output a bit on SER
2.  Strobe SRCLK L-H-L
3.  Repeat for all bits
4.  Strobe RCLK L-H-L

That's it.  You can also connect RCLK to a /CS signal for SPI.  In that case connect MOSI to SER and SCLK to SRCLK.  RCLK will be held low initially (blocking output changes), 8 bits will be clock into the shift register, and RCLK raise back to high outputting the 8 bits.
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