my noob journey to lower DMM noise (keithley mods)

[3roomlab]

while spending some time getting used to a used K2015 THD bench DMM, i got the chance to compare some readings with this post
https://www.eevblog.com/forum/testgear/dmm-adc-noise-comparison-testing-project/msg763062/#msg763062
(thanks to Alex and TiN). i then discovered an odd noise problem with my used K2015

under 0.1v range, 10NPLC and 1 NPLC seems fine (i even added in a 5 NPLC)
01 NPLC, 19999samples set 1, sampling 5Hz,   autozero=1, filter=0,REL=0 [mean = 0.003uV, SD = 0.488]
01 NPLC, 19999samples set 2, sampling 5Hz,   autozero=1, filter=0,REL=0 [mean = 0.019uV, SD = 0.500]
01 NPLC, 19999samples set 3, sampling 5Hz,   autozero=1, filter=0,REL=0 [mean = 0.030uV, SD = 0.492]
05 NPLC, 19999samples set 4, sampling 2.5Hz, autozero=1, filter=0,REL=0 [mean = 0.034uV, SD = 0.309]
10 NPLC, 19999samples set 5, sampling 1.5Hz, autozero=1, filter=0,REL=0 [mean = -0.065uV, SD = 0.211]
10 NPLC, 19999samples set 6, sampling 1.5Hz, autozero=1, filter=0,REL=0 [mean = -0.086uV, SD = 0.232]
10 NPLC, 19999samples s14, sampling 1.33Hz, autozero=1, filter=0,REL=0 [mean = 0.017uV, SD = 0.236uV] 1v
10 NPLC, 19999samples s15, sampling 1.33Hz, autozero=1, filter=0,REL=0 [mean = 0.011uV, SD = 0.796uV] 10v
1 NPLC, 19999samples s16, sampling 8Hz, autozero=1, filter=0,REL=0 [mean = -1747uV, SD = 61uV] 100v
1 NPLC, 19999samples s17, sampling 8Hz, autozero=1, filter=0,REL=0 [mean = -1665uV, SD = 197uV] 1000v

when i hit 0.1 NPLC, my noise readings are way way off
0.1 NPLC, 19999samples set 7, sampling 10Hz, autozero=1, filter=0,REL=0 [mean = 1.279uV, SD = 155.668uV !!!!  ]

before this is a recapping run, all caps are replaced with minimum 105^oC [5k hrs+++] spec caps, and all have been oversized by at least 1.5x-3x. before the above sets of logs, there are over 50 other logs to track the noise post capping. and so far, as it seems, the mean average is getting lower and lower (the logs are taken in reverse set 7 to set 1, when it all started yesterday, the mean was over -0.5uV, the NPLC 0.1/NPLC0.01 are all gone ape in readings).

curiosity 1) with new caps in place, i have never reached near zero mean before. is my guess correct that larger bypass caps do reduce measurement noise performance?

curiosity 2) when these DMM are switching amongst NPLC modes, does the multislope circuit increase in samplings (and error)? i will try to poke a scope in there, but i have no idea how it works. except for this article http://www.google.com.sg/patents/US5321403 ... only barely grasping some bits)

curiosity 3) if i look at the K2000 schematic page 7 on multislope, i am guessing the logic to the left are the different multislope section, goes thru filter around C179, and i am guessing C171 is the key of the entire multislope? the original K2000 schematic is from some chinese guy

curiosity 4) by looking at the noise charted (see pic, Y scale is in uV, yep uV of noise  ? this log is 3998 samples, 0.1NPLC, mean = +13.6uV, SD = 166uV ! ouch !), it is as if 1 of the multislope logic to the left is "broken" or injecting noise? i dont suppose anyone have seen such a problem before? in NPLC modes 1 or more, they are all "quiet". from the pic, there seem to be some kind of saturation point @ 250uV. (when i have more time, i will scope this bit of noise)

does anyone have tips on what else could lead to a extremely noisy low NPLC performance?

all input appreciated
(edit : added NPLC 10 1v/10v/100v)

[Kleinstein]

The NPLC settings of 1 and more (integer) give a rather good (could be 100 dB) suppression of line frequency (and harmonics). So the much higher "noise" at the faster rates is likle coupling to 50/60 Hz or 100/120 Hz ripple. SO to a large extend it is normal to have much more spurious signal with the fast readings. When sampling fast one should be able to see the signal and measure the frequency - so it's not noise but a spurious signal.

Relacing the supply caps with larger values can acutally cause more ripple currents though the ripple voltage at the supply will be lower. So this must not be an improvement. The residual power line coupling can be tricky, as there are several ways of coupling. One might be able to reduce it by carefull fixing the cables at the right position. Possible an extra shielding may be needed. Sometime even reversing the plug (possible in most of europe) has an influence.

[3roomlab]

The NPLC settings of 1 and more (integer) give a rather good (could be 100 dB) suppression of line frequency (and harmonics). So the much higher "noise" at the faster rates is likle coupling to 50/60 Hz or 100/120 Hz ripple. SO to a large extend it is normal to have much more spurious signal with the fast readings. When sampling fast one should be able to see the signal and measure the frequency - so it's not noise but a spurious signal.

Relacing the supply caps with larger values can acutally cause more ripple currents though the ripple voltage at the supply will be lower. So this must not be an improvement. The residual power line coupling can be tricky, as there are several ways of coupling. One might be able to reduce it by carefull fixing the cables at the right position. Possible an extra shielding may be needed. Sometime even reversing the plug (possible in most of europe) has an influence.

yes i did have some thoughts about more problems with higher cap values, maybe i need a 2nd DMM to log the rails and see

[Kleinstein]

The rippel current from the transformer to the caps will be larger with larger caps - especially the high harmonics. One path of coupling is inductive coupling of these ripple currents. In a poor design also voltage drop on wires / PCB might contribute.

[3roomlab]

i opened up the 2015THD dmm today due to a teething suspicion i have about the noise problem.

i measured the ground or common return paths of regions on the PCB that has a local bypass cap (the usual SMD ceramics). then i discovered that at the furthest point of the supply chain, the ground plane actually have over 0.5ohms  ... wait a minute, isnt ground planes supporting sensitive circuits suppose to have a good ground to prevent "what do you call this ground resistance errors?"

so after some more checking to make sure it isnt some special inductor thing, i soldered thick jumpers from the main supply bypass common to about 5 locations where ground plane resistances are on a different level. now all planes are under 0.03ohm (but this is measured on a UT61E, with relative zeroed, so it could be higher).

and the following are the 2 plots of "noise"
0002.jpg right off the bat from DMM power on. 1 hour plot, 1v 10NPLC filter/REL=off. AZERO = on
0102.jpg next hour continuation

it looks like big movements even after 2 hours, but on closer scrutiny, using naked eye, the peak to peak noise (looks like under 1uV max) seem to have been reduced by 1/3 or more comparing with my previous plots (looks like 1.5uV).

this is looking to be really interesting, do old used DMM copper ground planes degrade? or isit because of lousy china grade material? or isit because there is material cut back on ground planes used? 

(similar to the post before this where i have tried to insert a AC cable common mode inductor --> grey plot, this measurement was done with 1 small 30uH inductor removed. the cable now has only 1 "inductor" 4 turns AC cord on a very high AL-toroid, producing about 280uH)

*update* 2 more logs but in the 2nd the DMM suffered an accidental bump  . as it stands, maybe it is sunday that there are lesser jittery spikes, or it is the effect of removing the parasitic resistance from the ground plane?
next possibility of pushing this to the edge is changing the capacitors again to even lower ESR, and using even heavier gauge ground plane connection jumpers .... cmon neighbors, pls turn on ALL your appliances ! gimme more noise !

[3roomlab]

i made a little progress after adding some SMD bypass caps on suspicion that some had somewhat degraded, using a low grade ESR checker, most of the 100nF caps have a reduced capacity, which suggest further "reforming" or replacement may be in order (http://www.johansondielectrics.com/ceramic-capacitor-aging-made-simple.html and here http://www.murata.com/en-sg/support/faqs/products/capacitor/mlcc/char/0006 ... learnt something new here abt aging, they are like old batteries !)

1v scale, 10NPLC, 1Hz sampling, AZERO=on, filter/rel = off

average = -0.269uV
skew = -0.059
kurt = -0.123
STDEV = 0.209uV (best of 5 sets = 0.204uV, worse = 0.239uV. compared to initial logs approx 0.5uV)
AVEDEV = 0.168uV
TRIMMEAN 0.1 = 0.998

average STDEV of past 5 hours = 0.21 to 0.24

a casual probe of various points in the analogue section also reveals the multislope section DOES create some noise when it does some kind of charge dump or reset (or maybe that is the actual sampling acquisition burst). there is also a floated part of the circuit where the "ground" is actually 400mV pk-pk of the 50Hz AC

i guess i have to conclude that it is possible to further reduce noise floor, by careful inspection of where to insert additional bypass and "beef up" ground plane. atm, spurious noise still plague the log, the only logical conclusion is noise interference from AC power.

next possible aim is to try to reach 0.1uV noise STDEV once ac noise can be arrested properly

[3roomlab]

a long overlay of 5 plots
red - original with some ground plane "beefed" + additional bypass e-caps (mainly around LM399)
grey - same as red + external common mode choke
green - some more additional bypass caps (multislope opamps etc)
pink (right, pink box summary) - different variant of ground plane
black (left, pink box summary) - different variant of ground plane (+ additional SMD bypass)  +/- supply lead in. this is the most recent

anomaly A1 to 6 (and aliens) were records where during stable logs (reference to grey/red plot), the plot will skew up wards (or become messy/quiet) leaving NO plots in -ve region. these are suspected to be heavy equipment being turned on elsewhere shifting the AC mains. the events are very visible especially as they last a few seconds. on the other hand there is suspicion of a thermally unstable/noisy component hitting a certain temperature and going apeshiat.

*edit : example blue plot of a relatively stable log suddenly going apeshit
*edit2 : bell curve binning of a short test @ 10v range 10NPLC reveals that the minimum resolving resolution of the DMM is 50nV@10v. it may also suggest resolution is 5nV@1v and 0.5nV for 100mV (which confirms an earlier test at 1v where i increased binning resolution to 1nV, results skip approx every 5th bins). atm improvements in 10v noise are only marginal (small improvement, STDEV 796uV-->755uV), maybe there is something i missed
*edit3 : 100v @ 10NPLC short test. even with the horrible looking skew. the STDEV is nearly half of old logs !
average = -1895uV
skew = -0.92
kurt = +1.13
STDEV = 30.87uV (old data 6 logs average 54uV, alex nitins' log =51uV)
AVEDEV = 23.34uV
TRIMMEAN 0.1 = 0.999
now i cant wait to see what happens after the actual murata SMD caps arrive to replace these china SMD temporary caps
*edit 4 : 100v @ 10NPLC continuation
average = -1869uV
skew = +0.017
kurt = +0.084
STDEV = 19.39uV (new best)
AVEDEV = 15.37uV
TRIMMEAN 0.1 = 0.999
with a curious up drift as if something else has not yet warmed up 
*edit 5: a pic of new caps that will be going in for tests. the crap ESR meter cant even read its ESR properly, too bad DE-5000 is not in my to buy list yet. http://sg.rs-online.com/web/p/aluminium-capacitors/7149607P/

it is so weird, computer motherboards are $100 items, and yet they have better caps than a $1000 DMM

*edit 6: 1000v @ 10NPLC
average = -1802uV
skew = +0.051
kurt = +0.077
STDEV = 80.06uV (old logs average 119uV)
AVEDEV = 63.84uV
TRIMMEAN 0.1 = 1.000
keithley must be thinking these improvements are not worth the extra capacitors, well i agree, it is not like i am driving down noise by 10 fold. but at least now i do know, the situation on the last digit can be improved

[3roomlab]

it looks like i did a little teeny bit more advancement today getting the STDEV just under 0.2uV, by reducing the path resistance L104 is taking to AGND, and introducing a "OSCON" to bypass C227 for testing.

1v scale 10NPLC azero = on (filt/rel = off)
average = 373.74nV
skew = -0.030 /
kurt = +0.106
STDEV = 186.72nV
AVEDEV = 148.37nV
TRIMMEAN 0.1 = 1.001

in the plot, there are 2 very obvious "dips" (around 12000, 14000). which has happened before, this makes me suspect a DC bias problem in my AC mains (https://www.eevblog.com/forum/beginners/are-these-dc-blocker-any-good/). however, without further "logging" my AC supply, i cant know for sure. spot measurements suggests i do not have a DC bias problem, but they always come and go when you do not measure it  ...

example the plot before this was taken (plot 1347)
average = 387.57nV
skew = -0.062 /
kurt = +0.085
STDEV = 209.22nV
AVEDEV = 165.55nV
TRIMMEAN 0.1 = 1.002
as usual, dips and dips (between 8000-8500 n 9500 onwards). unfortunately, i am nearly out of ideas to find/reduce the effects causing the dips, hopefully something will come to mind soon-ish

a mod idea came to my mind, to use top side IC pins to group common AGND. perhaps next round (as bottom trace variations seems to have been somewhat exhausted) ...

almost rounding up this update post, and plot 1547 is done. and it confirms the under 0.2uV trend, just barely 
average = 387.64nV
skew = -0.098 /
kurt = +0.122
STDEV = 195.47
AVEDEV = 154.71nV
TRIMMEAN 0.1 = 1.004
as usual, a large dip clearly spoils the nice "picture" @16500

i wonder, if 3458a gets modified ... to read 9 to 9.5 digits consistently ... wouldnt that be awesome?

[Kleinstein]

The dips look a little strange, a little like Popcorn noise.

What makes me wonder is, why the average readings are not much close to zero. This usually should be be less than 0.1 µV for a shortet input.

[3roomlab]

yea i am still trying to rule out possibilities to get to the source
i could try to scope around one of these days. but it is so intermittent, i dont think i could hold a probe still for that long 

as for the average, it is because i changed the return path resistances of AGND.

[TiN]

I have only one question.
What is this thread doing in beginners section? I go this section once in a year (yah, snob detected).

it is so weird, computer motherboards are $100 items, and yet they have better caps than a $1000 DMM

Not really, PC MB's made in hundreds of thousands/month pieces, while bench DMMs few thousands/year?

To be honest, I found evil capacitor theory a bit of a long shot, as they are not charging-discharging frequently, like in switching DC/DCs.

Maybe you sneeze over PCB, making it dirty and leaky? Try careful cleaning with IPA. Also try rear terminals short, it could be bad switch.
You responsible of making me sad again about 2000 I have...

[3roomlab]

@ TiN ... its is suppose to be a random ghetto mod (75% random un-proven ideas)

mmmm switch and rear bananas. maybe i could try that. or even a hard solder short on PCB point to point.

well since i am up and about, i saw some logs done. this 1 really put a smile on my face. its a new best STDEV in 10v scale (under old log 15, that 1 has a STDEV of 795nV)

10v scale 10NPLC azero = on (filt/rel = off), plot 2248
average = 498.27nV
skew = +0.007
kurt = +0.126
STDEV = 550.21nV
AVEDEV = 438.35nV
TRIMMEAN 0.1 = 0.999

plot 2348
average = 565.59nV
skew = -0.015
kurt = +0.008
STDEV = 557.49nV
AVEDEV = 443.86nV
TRIMMEAN 0.1 = 1.000

plot 0048
average = 529.89nV
skew = -0.127
kurt = +0.063
STDEV = 580.67nV
AVEDEV = 461.28nV
TRIMMEAN 0.1 = 1.008

i suppose this nearly adds a 1/4 digit accuracy to 10v scale measurement doesnt it?

taking a peep at plot 0048, it seems when 10v circuit is selected, the dips are more frequent (i realized that i have only 1 old 10v log to compare to, and it is bloody noisy plot), which may suggest, klein's idea of popcorn (semiconductor noise) effect might be true. which could point to a very noisy gain opamp/BJT? ... i think i need a "popcorn" geiger circuit detector !

(right off the bat a huge dip @ 7500 )

fyi also the pix of the bottom side (after 3rd wash). 1210 SMD murata replaces old 1206 0.1uF (ESR = 1.6ohm using lousy LCR meter) bypass, but due to space constraint it is stuck on side ways (its a X6S 10uF). on top of that, a giant ecap 470uF 35v. this is the area of L104, the AGND jump wire to "OSCON" bypass. that cap is being piggy backed with the existing smd (its a 3in 1, 0.1uF + 10uF + 330uF). its really asking the 1206 solder pads to do the unthinkable

(and we can see the "bean counter" effect in the plot, the resolution of the DMM here is 50nV)

**update** 2 logs 1kv done, nice numbers as well (new best personal record low STDEV)
plot 0500-58, 1000v scale 10NPLC azero = on (filt/rel = off)
average = -1855.68uV
skew = -0.130
kurt = +0.082
STDEV = 54.55uV SD ppm becomes 0.05 !
AVEDEV = 43.43uV
TRIMMEAN 0.1 = 0.999

(i realize big mistake in previous posts, most xxx.xx readings are suppose to be nV, but i said uV )

i have a bad tinkering feeling that i am going to satisfy my craving by changing all normal caps to OSCON ... this is not "good" ( i have to blame RS components, the new search GUI is now better than element14, search capacitors by ripple current handling spec!)

[3roomlab]

100v scale 10NPLC azero = on (filt/rel = off), plot 719-00
average = -1803.17nV
skew = +0.057
kurt = -0.030
STDEV = 18.83uV another jackpot !
AVEDEV = 15.14uV
TRIMMEAN 0.1 = 1.000

as a previous post suggested, top side opamp powersupply pin mods. there is also the possibility of opamp swap to low noise version. but being unfamiliar with specific application families, i highlight these 2 based just on noise figures in PDF.
NE5534 -> OPA227 ?
AD711/OPA177-> OPA140 ?

**edit, best 100v plot (1119)
average = -1768.47nV
skew = +0.007
kurt = -0.051
STDEV = 17.96uV
AVEDEV = 14.31uV
TRIMMEAN 0.1 = 1.000

[TiN]

I found using histogram frequency distribution more easier to grasp for such noise measurement tasks.

E.g.:

[Kleinstein]

Without knowing the circuit, it is difficult to impossibel to find OP replacements. It really depends on the way they are used wether the OPs contribute much to the noise and which parameter is important. There often is no easy update that is better in every aspect.  Sometime faster is a problem and can make a circuit oscillate or ring more.

There should not be very many (if at all) OPs that give a significant contribution to noise / ripple pick up.

Even with just relacing caps - lower ESR is not allways better. Sometimes ESR is needed to dampen local resonaces at high frequencies. Two low loss caps and a suitable piece of wire can make resonator. One low ESR cap and one with resonable ESR are often the better combination.

For looking at ripple it might be usefull to da a really fast reading, if the DMM supports this. This way one can the the waveform and thus what frequencies (60/120 Hz ?) that contribute. The slower readings are much less sensitive to line synchronous pickup and how much they pick up may depend an phase and can be thus not well repeatable. So one should test for such signal pickup in the fast modes.

[3roomlab]

yes indeed combi caps, it resulted in 1000v 100v 10v 1v having lower noise, but just that 0.1v have slightly more noise (abt 5%). and weird looking ones. i have just finished top trace mod, and is now logging again to see if localized bypass on top side of PCB will help to reduce any further noises.

[lukier]

Very interesting experiments 3roomlab!

I would be too worried to experiment like that with my Keithley 2015, as it is my main workhorse multimeter in the lab.

Recently, I've scored 3457A and I'm keen on doing some modifications there to lower the noise and thus make the 7th digit a bit more meaningful.

Your results are very interesting indeed. I always thought that the biggest contributors to noise (at least 1/f or Johnson one) would be 10M resistor divider (for 100/1000V) and JFET + Opamp amplifier with its associated circuitry. I wouldn't suspect the caps, especially common bypass ones.

I was thinking about replacing TL072 in 3457A (used in the JFET amplifier stage) and using a more modern lower noise part, like OPA2134/OPA2192/OPA2140. I still need to analyze how feasible it is and how real improvement it can bring.

I might look at the capacitors and grounding as well.

[Kleinstein]

In the 3457 voltage (andohms)  input stage, the OP is not critical. Noise is essentially set by the FETs and the series resistors used for protection. The switches in the hybrid might give some contribution (charge injektion from AZ phase and thermal EMF).

Much of the noise could be from 100 K at the input - at least for the white noise this should be more than the FETs. With 1/f noise the JFETs might give more.  There may be also noise from the ADC itself. One might be able to check the performance with the resistors shortes out to understand where the noise comes from. This usually the first step before trying to improve a well thought through design. The third important source could be thermal EMF in combination with turbulent air flow. Here some improvement might be posssible. Also HF signals (e.g. wireless phones) might be a significant source of "noise". Looking at the qualitiy of the power supply might in deed help - but this would be more like using the scope. Here modern cap can be better than what was available back then.

So I don't think changing OPs will give an improvement. HP had better OPs than the TL071 to choose, using this OP allready indicates it's not a critical part. Chances are better with OPs that were state of the art at the time of design.

If you really need lower noise in a low level measurement, one likely would need an external amplifier without the need for CAT 2 - 600 V (or similar) protection. Today it is not so difficult to get lower noise, especially if one can tolerate a higher bias and do not need that much of protection. I remember getting lower noise than the 3457 with just an OP07 preamplifier.

[3roomlab]

Very interesting experiments 3roomlab!

I would be too worried to experiment like that with my Keithley 2015, as it is my main workhorse multimeter in the lab.

Recently, I've scored 3457A and I'm keen on doing some modifications there to lower the noise and thus make the 7th digit a bit more meaningful.

Your results are very interesting indeed. I always thought that the biggest contributors to noise (at least 1/f or Johnson one) would be 10M resistor divider (for 100/1000V) and JFET + Opamp amplifier with its associated circuitry. I wouldn't suspect the caps, especially common bypass ones.

I was thinking about replacing TL072 in 3457A (used in the JFET amplifier stage) and using a more modern lower noise part, like OPA2134/OPA2192/OPA2140. I still need to analyze how feasible it is and how real improvement it can bring.

I might look at the capacitors and grounding as well.

i hope you have a good time modding. TBH i was mucking around as i didnt really understand the DMM ( n electronics) that well. for opamp, i think OPA 140/228 looks good, in the keithley 2002 repair thread, TiN mentions AD797 and ADA4627-1. w/o knowing more about the opamps, im not so sure, maybe try all and log some noise? lol

will you post some progression updates? it be interesting to know if it shares similar problems (esp the tiny bypass caps and high trace resistances)

i guess i have to start calling my mods by a date code  , so that i can follow what i myself did

14NovA mod was to FULLY "shorten" AGND path of L104, as i suspected the inductor ringing due to the logics floating on it creates spurious noise. (DMM startup plot 2219). BUT ... @ plot 119, an elephant landed, i have no idea where that dip is from  . the plot previous to this is giving STDEV of 0.199uV.

14NovB mod was inversion of 14NovA, remove all AGND "shortening" of L104. at the same time, a few more 10uF bypasses are added on the logic side. (DMM startup plot 0516). as we can see the L104 re-floated does makes monkeys out of the readings (100mV 10 NPLC 1Hz sampling). (logging still in progress)

in the mod before this where 1000/100/10/1v logs have low noise, the AGND shortening was only biased more to the multislope logic ground side (which shares same AGND). however the logic side and the analog section AGND traces are not shortened.

todays log will likely tell the story of which trace shortening i should use on L104 to force lower noise on 100mV range.

**update 2nd hour vs 2nd hour (with aliens landing in plot 616)

*** update as i noticed something strange about the temperature of the chasis going up. i went to measure the DC bias of AC, it is constantly going around 0.05v and AC seem to have slightly dipped (this is likely going to show as anomaly on logs too if i guessed right)

[lukier]

In the 3457 voltage (andohms)  input stage, the OP is not critical. Noise is essentially set by the FETs and the series resistors used for protection. The switches in the hybrid might give some contribution (charge injektion from AZ phase and thermal EMF).

Much of the noise could be from 100 K at the input - at least for the white noise this should be more than the FETs. With 1/f noise the JFETs might give more.  There may be also noise from the ADC itself. One might be able to check the performance with the resistors shortes out to understand where the noise comes from. This usually the first step before trying to improve a well thought through design. The third important source could be thermal EMF in combination with turbulent air flow. Here some improvement might be posssible. Also HF signals (e.g. wireless phones) might be a significant source of "noise". Looking at the qualitiy of the power supply might in deed help - but this would be more like using the scope. Here modern cap can be better than what was available back then.

So I don't think changing OPs will give an improvement. HP had better OPs than the TL071 to choose, using this OP allready indicates it's not a critical part. Chances are better with OPs that were state of the art at the time of design.

If you really need lower noise in a low level measurement, one likely would need an external amplifier without the need for CAT 2 - 600 V (or similar) protection. Today it is not so difficult to get lower noise, especially if one can tolerate a higher bias and do not need that much of protection. I remember getting lower noise than the 3457 with just an OP07 preamplifier.

Thanks for the analysis. To be honest my analog design skills are pretty poor (just simple opamp circuits and single transistors, I do mostly digital or just switching power mosfets on and off for motors ), but I think I'm getting infected with volt-nuts disease

3457A is pretty old so I thought that there might be more modern low-noise parts nowadays that HP, with all their ingenuity, couldn't use.

What bothers me (and that's why I thought about such mods) is very peculiar ranges arrangement in 3457A. There is no 10V -> 1x amplifier -> ADC path in this instrument. 3V range is the most direct one and even this has 3.33 amplification to bring the signal to 10V levels for the ADC. Next range, 30V, goes through 10M divider (sic!) and is then amplified. This is quite bad, no high input impedance above 3V and likely higher noise. So I thought at least what I can do is to bring this JFET+OpAmp amplifier noise levels a bit lower. I don't want to replace the JFETs because they seem unobtainium. Nobody seems to stock things like LSK389 and similar low noise JFETs (don't remember off hand which ones are in 3457A, but LSK389 is in DMM7510), so I thought about the amplifiers around them. A lot of stuff (resistor networks, analog switches) are in the hybrids so also difficult to mod.

i hope you have a good time modding. TBH i was mucking around as i didnt really understand the DMM ( n electronics) that well. for opamp, i think OPA 140/228 looks good, in the keithley 2002 repair thread, TiN mentions AD797 and ADA4627-1. w/o knowing more about the opamps, im not so sure, maybe try all and log some noise? lol

will you post some progression updates? it be interesting to know if it shares similar problems (esp the tiny bypass caps and high trace resistances)

I'm pretty much the same just mucking around I just thought of possible cheap improvements. TiN recently wrote an article about modding 3456A by using triple LM399 to reduce the Vref noise. I could do that as well, but for me it seems already at the point of diminishing returns, not to mention putting LTZ1000 there - got this meter rather cheap. So this input amplifier OpAmp was the only thing I could think of, but maybe I'll play with capacitors as well.

When I get time I'll post some updates. TBH you need a lot of patience for this. Solder a cap, collect 2 hours of data, solder a bit of wire, collect hours of data and so on

BTW Do you have any special low thermal shorting plug (these things from Agilent/Keithley are stupidly expensive) or just a bit of copper wire? (3457A has proper binding posts so I often wrap copper solder wick there).

[3roomlab]

haha if i keep on tinkering, i need more than 1 lifetime. atm, i its 24 folders 450+ files, half are bean counter, so over 200+ logs and counting

i didnt have any special shorting plug, i bought some very good banana plug from china. the lantern spring contacts have a nice bulge and spring, it is better than the hirschmanns i bought for 50x the price . this then with double 18AWG wire. to offset the thermal coefficient problem (inside hotter than outside), i bunched up some cotton around the shorting plug so that the plug will try to heat up faster than normal and hopefully do lesser EMF voltage. due to the used nature of this unit, i find that every 20-50 plug in-out, the 4mm socket leaves a visible amt of "grounded" socket  . i might want to change this to probably new socket from "multi-contact"

how much are those "official" short plugs?

(3rd hr update plots, 716 modB vs 0019 modA)

[lukier]

i didnt have any special shorting plug, i bought some very good banana plug from china. the lantern spring contacts have a nice bulge and spring, it is better than the hirschmanns i bought for 50x the price . this then with double 18AWG wire. to offset the thermal coefficient problem (inside hotter than outside), i bunched up some cotton around the shorting plug so that the plug will try to heat up faster than normal and hopefully do lesser EMF voltage. due to the used nature of this unit, i find that every 20-50 plug in-out, the 4mm socket leaves a visible amt of "grounded" socket  . i might want to change this to probably new socket from "multi-contact"

Can you say which ones you got from China? I want to buy some more banana plugs. Most of them are unfortunately gold plated brass, so not great for thermal EMF. For day-to-day cables I don't mind that much and prefer the stacking ones, but for noise and low voltage measurements I thought about buying 4mm dia copper rod, on one side cut through a bit in an X shape to make it more springy, on the other side a small hole to put copper wire and crimp it in the vice. Applying plenty of deoxit everywhere

Also I want to try out fork busbars as the source of fork terminals, just need to check binding post diameter:

http://g02.s.alicdn.com/kf/HTB14_UKHpXXXXbQXXXXq6xXFXXXY/202149791/HTB14_UKHpXXXXbQXXXXq6xXFXXXY.jpg

These things look like pure copper, maybe if these are big enough they could be cut into pieces, copper wire crimped somehow and it would make great low-EMF leads.

how much are those "official" short plugs?

Not cheap

http://www.tequipment.net/Keithley8610.html
http://www.newark.com/keysight-technologies/34172b/calibration-short-digital-multimeter/dp/92T5065

[3roomlab]

im afraid those i bought are nickel plated brass lol. the plug i soldered is using this.

http://world.taobao.com/item/17014096660.htm?fromSite=main&spm=a312a.7700824.w4002-2384870785.28.1KPfKO

i also got the gold version to try as well. which has the piggy back socket on the rear of the banana. i have yet to put it into use.
http://world.taobao.com/item/14757565204.htm?fromSite=main&spm=a312a.7700824.w4002-2384870785.46.1KPfKO

but i find the cotton bunching insulation solves the thermal leak. when using the nickel plated bananas, i did noticed the EMF wrecking ball in my old logs, i kept thinking i needed some special plug too, but i thought if the temperature could be equalized, there would be nearly nothing left to produce disturbing EMF. if the insulation cover is "long" enough so that the temperature leaks in the wire into the outside, the "noisy" temperature difference junction will be no longer at the meeting of 2 different metals and so likely would amount to nearly no EMF (i am assuming alot here) ... but that is my theory and assumption, which seems to have been working well in the newer loggings (or maybe there could be certain artifacts i didnt notice but i wouldnt know)

edit : all serious measurement junctions need a good "mink coat"  , catch a chill and the entire log is fxxxed
the  34172B   looks solid ! solid price too !
but for now, i think the $0.05 cotton "coat" kind of enables any contact to any contact

**edit, oh and their J-hook clips are great. they come in "copper" or "gold" plated.

[3roomlab]

I found using histogram frequency distribution more easier to grasp for such noise measurement tasks.

i have these logged too. but atm, i need to see time scale as i need to know when elephant sized artifacts go thru. it is likely the popcorn effect described by kleinstein is the actual cause, as i watch the log, the pops n dips are somewhat always around 1uV in size. also with timescale i could probably estimate if temperature affected the skew in some way

(4th hr comparison update, 816 = modB vs 119 modA)

** for lukier's info, i did this vid sometime ago. you can see the difference in the fin. on the hirschmann, the fin protusion is rather small, so contacts have to be very clean for perfect mating, the china made with somewhat bulgy fins have so far been "harsher" on the socket (i suspect it digged more than it should), but it get good contact (better than the hirschmann i would say 9 out of 10 times, twisting the jack in socket, the hirschmanns will cause the DMM to jump readings more often then the bulgy finned)


while it is bad practise to mate dirty contacts, i find the bulgy finned to be easier to use as there were times, log readings were jumpy due to weak mating.

and this, is the strange trafo hum of my keithley LOL !!! (VFD is off during recording)

[lukier]

im afraid those i bought are nickel plated brass lol. the plug i soldered is using this.

http://world.taobao.com/item/17014096660.htm?fromSite=main&spm=a312a.7700824.w4002-2384870785.28.1KPfKO

These are shrouded. Yuck

I got these some time ago, not the best and surely not low thermal, but cheap, stackable and with retractable shroud:
http://www.aliexpress.com/item/50pcs-5color-Gold-Plated-Retractable-4mm-Stackable-Plug-Soldering-Type/1781741357.html

i also got the gold version to try as well. which has the piggy back socket on the rear of the banana. i have yet to put it into use.
http://world.taobao.com/item/14757565204.htm?fromSite=main&spm=a312a.7700824.w4002-2384870785.46.1KPfKO

These are 2mm. I have no idea who uses these. 4mm banana seems to be a standard. AFAIR 2mm was sometimes found in very old gear.

but i find the cotton bunching insulation solves the thermal leak. when using the nickel plated bananas, i did noticed the EMF wrecking ball in my old logs, i kept thinking i needed some special plug too, but i thought if the temperature could be equalized, there would be nearly nothing left to produce disturbing EMF. if the insulation cover is "long" enough so that the temperature leaks in the wire into the outside, the "noisy" temperature difference junction will be no longer at the meeting of 2 different metals and so likely would amount to nearly no EMF (i am assuming alot here) ... but that is my theory and assumption, which seems to have been working well in the newer loggings (or maybe there could be certain artifacts i didnt notice but i wouldnt know)

edit : all serious measurement junctions need a good "mink coat"  , catch a chill and the entire log is fxxxed

It seems you are overthinking it. I'm not saying there is something wrong, but double check everything. Nickel shrouded plugs, solder + double wire + cotton. A lot of metal junctions, plastic shrouds insulate a bit, everything has some mass so it takes a while to reach temperature equilibrium etc.

Just get copper wire from UTP cable, clean it and stick it in the sockets. Maybe with some cotton ear buds as TiN often does to keep the wire in place + some cover from airflows.