EEVblog Electronics Community Forum
Electronics => Beginners => Topic started by: eisitten on October 17, 2016, 07:53:19 am
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Hi,
I am using a voltage divider with large resistors in a low power application (feedback for the voltage regulator). The divider resistors are approx. R1 80 Mohm and R2 1Mohm (the Vin is about 80v). In order to keep the resistor divider unloaded and the input bias current small I am using an op amp as a voltage follower. I understand the input bias current introduces a voltage error. However I do not understand the path of the bias current so I can't calculate the voltage error.
I know I can calculate the voltage error: V = Ibias x R. But how do I know the value of R. Does the bias current flow to/from the op amp input to ground via the R2 or to Vin via R1 is should I use a thevenin resistance (i.e. R1 || R2)?
This is not the actual circuit, just for reference.
(http://i.stack.imgur.com/xb4C2.jpg)
And can I use the same value of R to minimize the effect of Ibias by using similar R in the feedback path? As in for example:
(http://www.daenotes.com/images/bias-current-compensation-in-voltage-follower.png)
Thanks in advance!
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The voltage error will be above or below, depending on the op-amp and conditions.
Bipolar amps traditionally source current out of the pins, so the measured voltage is high.
You probably want to use a precision CMOS chopper amp here, assuming you don't need quick response.
Tim
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You are already using a simulator, this is TINA, right? Disconnect the opamp, connect a "current source" to the point. Make the "current source" source or drain the bias current to the point, and measure the voltage.
80 Meg is a insanely high value in my opinion. Any tiny coupled noise will be huge.
OPA4334? I dont think that exist... Anyway, it is probably a OPA334, that has 0.28mA Iq. So I would set the resistors to some 0.05mA, say 1K-80K. The Opamp is going to drain the battery a lot more anyway. And probably put a capacitor or two ( one to the rail and the ground, so you have smaller turn on transient), to avoid excessive noise.
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This might help -
http://www.analog.com/media/en/training-seminars/tutorials/MT-038.pdf (http://www.analog.com/media/en/training-seminars/tutorials/MT-038.pdf)
Regards, Dana.
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To minimise the effects of bias currents, the DC impedance between each input and the power supply rails should be equal.
R3 should be in the feedback loop: connected between pin 1 & 2 and should be equal to the values of R2 & R2 in parallel: 2k35.
Suppose the bias current is 1µA. If one input were connected to a low impedance and the other to 2k35, then one input would be 2.35mV above the other. Now if both of the inputs were connected to 2k35, the voltage at each input will be now 2.35mV higher than the ideal value, which will be cancelled out by the common mode rejection ratio. There will still be and offset due to the difference in bias currents, input offset and common mode rejection ratio though.
You probably don't need an op-amp with an extremely low bias current, as long as the voltages at the inputs don't exceed the common mode range, when the effect of the bias currents is taken into account, it will work.
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OPA4334? I dont think that exist... Anyway, it is probably a OPA334, that has 0.28mA Iq. So I would set the resistors to some 0.05mA, say 10K-80K. The Opamp is going to drain the battery a lot more anyway. And probably put a capacitor or two ( one to the rail and the ground, so you have smaller turn on transient), to avoid excessive noise.
:-//, that would mean around 1mA current (80k).
the Vin is about 80v
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OPA4334? I dont think that exist... Anyway, it is probably a OPA334, that has 0.28mA Iq. So I would set the resistors to some 0.05mA, say 10K-80K. The Opamp is going to drain the battery a lot more anyway. And probably put a capacitor or two ( one to the rail and the ground, so you have smaller turn on transient), to avoid excessive noise.
:-//, that would mean around 1mA current (80k).
the Vin is about 80v
Right. I dont know, if I have a simulator, I enter the values into it. And the opamp is not powered from the 80V so it drains some other power source. So half of what I wrote is invalid.
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I am surprised the data sheet does not specify a common mode and differential mode input resistance.
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Hi,
thanks for all the replies. I should have posted my schematic, but I do not have it here at work. This is the segment of the schematic that I was having problems with. I have not chosen the op-amp yet.
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Hi,
thanks for all the replies. I should have posted my schematic, but I do not have it here at work. This is the segment of the schematic that I was having problems with. I have not chosen the op-amp yet.
R3 might, or might not help here. The old schematics rely on the fact, that bias current flows int the opamp, and bias current is higher than offset current. If you design with a modern opamp, R3 can make things worse.
http://www.analog.com/media/en/training-seminars/tutorials/MT-038.pdf (http://www.analog.com/media/en/training-seminars/tutorials/MT-038.pdf)
"CANCELING THE EFFECTS OF BIAS CURRENT"
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Hi,
I am using a voltage divider with large resistors in a low power application (feedback for the voltage regulator). The divider resistors are approx. R1 80 Mohm and R2 1Mohm (the Vin is about 80v). In order to keep the resistor divider unloaded and the input bias current small I am using an op amp as a voltage follower. I understand the input bias current introduces a voltage error. However I do not understand the path of the bias current so I can't calculate the voltage error.
I know I can calculate the voltage error: V = Ibias x R. But how do I know the value of R. Does the bias current flow to/from the op amp input to ground via the R2 or to Vin via R1 is should I use a thevenin resistance (i.e. R1 || R2)?
This is not the actual circuit, just for reference.
And can I use the same value of R to minimize the effect of Ibias by using similar R in the feedback path? As in for example:
Thanks in advance!
You may estimate the error much easier, though your basic idea about "exact" calculation is correct..
The lateral current is about 1µ (80V/81MOhm)
The bias current, if you use an OPAMP with FET inputs, is on the order of, let's say 100 pA, so your voltage measurement error will also be on the order of 100pA/ 1µA ~ 0.01%.
For FETs, this bias current can act in either direction, as an additional current sink or source into the node, and it can vary in sign and magnitude with the common mode voltage on the + input.
So you might calculate in a detailed manner, for both cases with max. possible Ibias from the data sheet, over assumed temperature range, and simply select the type of OpAmp, which suits your accuracy requirements.
There are also MOSFET types available, which have < 1pA bias, which deliver negligible bias current errors, but might have big voltage offsets, which have to be compensated.
Also pay attention to appropriate input voltage protection (80V ???).
Frank
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Some really low Ibias opamp technologies -
http://www.analog.com/media/en/technical-documentation/data-sheets/ADA4530-1.pdf (http://www.analog.com/media/en/technical-documentation/data-sheets/ADA4530-1.pdf)
http://cds.linear.com/docs/en/press-release/LTC6268.pdf (http://cds.linear.com/docs/en/press-release/LTC6268.pdf)
http://www.ti.com/lit/ds/symlink/lmp7721.pdf (http://www.ti.com/lit/ds/symlink/lmp7721.pdf)
Regards, Dana.