EEVblog Electronics Community Forum
Electronics => Beginners => Topic started by: hp3310a on December 07, 2024, 11:10:09 am
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Hi everyone,
again me being clueless I guess. I'm still working on the input stage of my frequency counter. I followed this great post here https://www.eevblog.com/forum/projects/frequency-counter-input-stage/msg548579/#msg548579 (https://www.eevblog.com/forum/projects/frequency-counter-input-stage/msg548579/#msg548579) with a schematic of a real world input stage of a real world frequency counter, which copied more or less.
This works great for higher frequencies where my previous resistor-only voltage divider didn't work any more. However, and this is what is puzzling me now, when I connect the output of the divider to my opamp input, the voltage gets shifted about -1V towards the negative. I have no clue why.
Here's the signal and input stage output at the end of the voltage divider when unconnected to the opamp.
[attach=2]
And here when connected to the opamp.
[attach=1]
The screenshots where taken at 5.2MHz (the maximum my frequency generator can do). Yellow is the input signal at 16Vpp, red is at the end of the divider.
Here's the schematic and breadboard (the gray bridge is the one connecting the opamp input).
[attach=3]
[attach=4]
The higher the frequency the greater the negative offset with no offset at 50kHz or lower. It is more pronounced for square wave but happens a little with sine wave input as well.
What is going on? Apparently there's an interaction between opamp and voltage divider, but how and how can I get rid of it?
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Still no idea what causes the negative DC component at the opamp input. I tried adding a capacitor to filter DC out and it works very well.
[attach=2]
Need to do more testing with higher frequencies using a makeshift Si5351 based frequency generator, but it seems to work from 0-5MHz. I'm attaching the updated schematic for the record.
[attach=1]
That said, I would be interested in learning why it didn't behave as intended without the capacitor.
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What voltages are you supplying to the +ve and -ve rails of the op-amp?
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Easy
pin 3 has no DC path to ground. Add a resistor to ground (or other circuit reference point).
Where are your power supplies, is the opamp runing on thin air?
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I removed the supply circuitry from the schematic for simplicity, the opamp gets +5V and -5V (from a lab power supply). The input is well within the rails at +-1.5V.
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Turns out the "fix" with the capacitor doesn't work when I disconnect the probe attached to that end of the resistor. This is highly confusing, time to turn off the scope and do something else.
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Doublecheck your opamp is properly soldered to the breakoutboard.. Sometimes happens it gets rotated (pin1 is pin5 then).
And that is the opamp's output which creates the -1V then at the divider..
Btw for freqs above say 30MHz people use those vintage PLL divider chips (like the 64/63 or 128/127 one) which work till X GHz and are enough sensitive (X millivolts).
For frequencies below 30MHz an RF jfet (like BF245) plus a single RF transistor work fine..
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You are turning on an unusual feature in this amp as the frequency goes up. If you look at the CMVR, it has a FET input range but with a bipolar across it for overloads. The bias current is a pico Amp for the FET range but then goes to nano amps when you exceed about 2v on the input. At high frequencies, the caps on your dividers are shorting and high CMVR gets to input. All your coupling caps get charged up due to the higher current and the opamp dutifully follows. In the last iteration, you AC coupled + input, this won't work, you need to have a DC path. I guess the thing to do would be to bias the amp with a divider and then pass your signal in.
Other tips-
TP12 is not a good probe point- this is an ultra sensitive node.
Frequency Counter inputs are generally pretty sensitive, maybe a 1/2v max. Often they'll have a 20 db atten to knock down signals. Reduce your signals a bit.
Good luck.
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Interesting gotcha. You may be right, although this theory doesn't explain why it gets worse at high frequency, I think. It's possible that also the diodes between IN+ and IN- are involved, briefly conducting some small (and maybe not equal) current on each rising and falling edge if the output fails to keep up with the input.
I suppose things should improve if R8 and R9 are reduced. And I'm not sure if R9/C18 are useful at all?
And why are the ratios of R7/R8 and C17/C16 different? This means different attenuation at different frequencies.
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First of all, thanks very much for the incredibly helpful responses, those got me on the right track, though I'm not sure what I did is OK...
Doublecheck your opamp is properly soldered to the breakoutboard.. Sometimes happens it gets rotated (pin1 is pin5 then).
And that is the opamp's output which creates the -1V then at the divider..
Yes that happens and I can appreciate why. It's easy not to see the tiny marks indicating pin 1. Even sillier I had killed my first opamp in this prototype by wiring it as a single AD8033 when in fact is/was a dual AD8034.
You are turning on an unusual feature in this amp as the frequency goes up. If you look at the CMVR, it has a FET input range but with a bipolar across it for overloads. The bias current is a pico Amp for the FET range but then goes to nano amps when you exceed about 2v on the input. At high frequencies, the caps on your dividers are shorting and high CMVR gets to input. All your coupling caps get charged up due to the higher current and the opamp dutifully follows. In the last iteration, you AC coupled + input, this won't work, you need to have a DC path. I guess the thing to do would be to bias the amp with a divider and then pass your signal in.
That was very helpful, thank you. I wired the opamp as a non-inverting amplifier and two 2k resistors for the feedback voltage divider. I had read (here https://www.renesas.com/en/document/apn/r13an0003-how-bias-op-amps-correctly (https://www.renesas.com/en/document/apn/r13an0003-how-bias-op-amps-correctly)) the input needs an DC path for the input. Like this:
[attach=1]
This worked. However, that input resistor and capacitor form a very well working high-pass filter, so with sine wave input it worked only at 5MHz. With a square wave input it worked down to 50kHz because of a short spike that the comparator (which follows the opamp) was picking up.
I tried removing the entire filter while leaving the amplifier feedback intakt, and voila, that does the trick:
[attach=2]
This appears to solve the voltage offset problem this thread started with. The opamp the output is "malformed" in the negative, not sure why that is. In my case that's not a problem as the comparator just needs to see the negative half-wave, it doesn't really matter how well-formed it is.
[attach=3]
So the whole circuit now seems to work even with a small 0-3V input signal (my SI5351 frequency generator doesn't do more than 3V), well enough to work to at least 25MHz.
[attach=4]
TP12 is not a good probe point- this is an ultra sensitive node.
Indeed, for the tests today I attached the probe briefly just for verifying the signal was there, but otherwise detached it. For comparison, the output changes significantly whether or not the probe is attached.
[attach=3]
[attach=5]
Unfortunately I have no good alternative point for probing the opamp input.
Frequency Counter inputs are generally pretty sensitive, maybe a 1/2v max. Often they'll have a 20 db atten to knock down signals. Reduce your signals a bit.
I was under the assumption that's what I'm doing, but I have since learned, I'm not. I guess this is something I have to figure out because I have a feeling the circuit will unduly strain the signal source, which is a test point in my HP3310A frequency generator and not the high-power output.
I suppose things should improve if R8 and R9 are reduced. And I'm not sure if R9/C18 are useful at all?
And why are the ratios of R7/R8 and C17/C16 different? This means different attenuation at different frequencies.
That was a mistake on my part, I changed the capacitors to 10p and 68p to match the resistor ratio exactly. I didn't try (yet) to reduce the resistor values because I'm trying to put as little load as possible on the signal source - though I'm no longer sure that is the way to go.
Thanks again for all the helpful advice!
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Use the thanks button- its all I live for these days of my dotage.