PDN design workflow (AC only)

[learnfromfailures]

I'm new to PDN design flow. To design a PDN system below the target impedance, I'm trying to follow these steps. Can someone let me know if I'm missing anything ?
1) Calculate transient current requirement (delta I) 
2) Voltage is 1.8v (limit 5% of that)
3) Calculate target impedance
4) Simulate that PDN system (VRM, decoupling cap, traces and power planes) with that transient current and get impedance frequency response 
5) Select an LDO and analyze the frequency range. Check if it necessary to constrain the design
6) add decoupling capacitor to provide low impedance from VRM frequencies up to almost 100MHz.
Am I doing this right ? or going in a wrong path ?
How do I choose the value of the caps ? How can I simulate a VRM which has an exact non linear VRM model (inductance especially ) ?