Electronics > Beginners

PFC Math

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TheDood:

--- Quote from: Siwastaja on December 22, 2019, 12:59:23 pm ---I don't understand the idea of calculating equi-power time-divided sections, or doing any time sectioning at all. For PFC, the formula indeed is:

I(t) = V(t) * k,

where k is a multiplier to reach your desired average output current. It can be based on a slow feedback of the output voltage, for example, for the simplest case.

The algorithm should be trivial; the devil is in the engineering details like understanding component ratings, designing the layout, etc., as usual.

The PFC thing becomes interesting when you are tasked with increasing a power factor of a certain load while minimizing component count and maximizing efficiency. Then it may be something else than the classical extra boost PFC stage. The idea is still the same: you try to draw a current which is directly proportional to the instantenous voltage.

I'm guessing that you have a basic misunderstanding that a constant current during the sine wave period is optimal for the distribution network. This is not the case.

--- End quote ---


--- Quote from: T3sl4co1l on December 22, 2019, 11:42:30 am ---A sufficient definition for unity power factor, is to draw current proportional to the instantaneous voltage.

That is why PFC controllers almost always use a multiplier function.

The general definition of PF, is the ratio between apparent and real power.

Apparent power is Vrms * Irms, and real power is avg(V*I).

When V and I are out of phase, or contain harmonics in different proportions, the RMS of each will be higher than the real power draw would suggest, and PF will be less than 1.

This is not a very prescriptive formula -- you can measure or calculate the RMS and average of various waveform pairs, but you can't so easily solve backwards for the one pairing that gives unity PF.  (Eh, actually you probably can, something about the sin^2 x <--> (1 - sin(2x))/2 identity should be involved.)


These limits keep the mains waveforms sinusoidal and in phase.  Passive rectifiers create harmonics, which increase losses in transmission equipment (especially transformers).  Phase shifts draw current (causing losses) without delivering meterable* power.  Both reduce the capacity and efficiency of the system.

*To residential customers, usually; industrial customers may have PF based metering though.

Harmonics are also undesirable on a 3-phase system, as multiples of 3 add constructively, which can draw nasty neutral currents, or develop N-GND voltages.

So overall, due in part to how we have designed our power transmission systems (i.e., historical reasons), but also in part because motors are still a huge part of power draw (polyphase is self-starting, does not deliver torque ripple, and 3-phase saves a bit on wiring capacity compared to 1 or 2 phase), and there isn't much real competition for plain old transformers -- these are why high PF is desirable.


You certainly can't draw "equal power sections" because near zero crossing, the current would have to go towards infinity.  A current draw of csc(t) has an insanely low power factor.

Even if one were to draw constant current (as a choke-input filter does, for L --> inf), that only gives a modest power factor, because the square wave current has harmonics which the sine wave voltage lacks.  Those harmonics account for 43% of the square wave so the power factor would be around 0.57.

So we can't do that either.  As it happens, we try to emulate a resistor (which has PF = 1 by definition).  Our load might not be a constant resistance, so we have to change the resistance in real time.  And obviously, we can't change it very quickly, otherwise we'd be dicking up that nice smooth sine wave current we meant to be drawing.  So the loop bandwidth is intentionally very low (a few Hz), and the output filter cap relatively large.

And so, very quickly you can see, it becomes very difficult indeed to talk about these systems, without also understanding control loops, how to set current draw in a switching circuit, and so on.


A riddle for you: in a PFC system, if the output voltage, and load current, is ~constant, what will the PFC's output current waveform (into the filter cap and load) look like?  What is special about it (or not very special, for that matter)?  You should only need to use the facts given in this post, I think(?), though that's probably not much of a hint I'll admit...

And from that waveform, what can you deduce about the minimum required filter capacitor, given some ripple (peak-to-peak voltage), mean output voltage, and load current?

Tim

--- End quote ---

Whoo doggy lol you guys are awesome! Thanks, I can see its going to take me a bit of a paradigm shift (I think). This guy is what I started watching today and will see if I cant gain a bit of understanding by the next time I come back.


Siwastaja,
I think Im following what you are saying, but still a bit confused. Its my understanding that current is C/s, and voltage is J/C. Lets imagine that the time interval from 0 to 1/2Pi is 1s, and the amount of possible Joules transferred is 10 (based on V and I of wave). So 10W. If I were to divide the wave into sections of 1J each, Id need to have a greater time interval near the 0 point than in the middle/end. This is because the V is not not very large (J/C), and so more time would be needed to flow enough coulombs to accommodate 1J. This demonstrates what I think you were saying about current flow being proportional to V, Id need more time at lower V's to flow the same amount of energy? This is why I was thinking about dividing the wave into sections of varying time intervals. If I know that my load (and cap before the load) draws 5J/s, then Id need to adjust duty cycle to 50% in each interval. If I didn't adjust the duty cycle my current draw would spike till the storage cap was full and then Id have an imbalanced current draw, or Id have more current draw in one or 2 sections compared to that of the others sections of the wave, and this would then result in poor PF? If I know what the cap needs in terms of J's to be fully charged then I can adjust the %duty cycle of each interval so that the transferred power resembles the sin wave and not only certain sections that flow spikes.


Tim,
Ahh, yes, not equal power, but equal Joules, but not intervals of equal J/s. Perhaps this is not the way forward though. You and Siwastaja have both have been hitting on the proportionality of Current to V, this is where Im getting confused because isnt the force wanting to flow I proportional to V all the time? Im assuming we are drawing bits of current and then boosting it onto a cap in bursts. That this way of burst charging a cap negates the leading phase shift compared to if the cap were allowed to charge without interruption? Also this type of sectioning the wave off into bits of current allows for the mitigation of only peak times transferring power, ie the power is transferred throughout the entire wave. Harnessing the property of an inductor to step up V and deliver I when mains V is too low for load to flow? V is set by mains, so Power is adjusted by current regulation, and current is C/s and dependent upon V so ... idk, lol wouldn't the time the switch was on and allowing current to flow match that of the V present during the on duration, ie the current flows more at higher V and less at lower V, so wouldn't the proportionality be maintained, just the amount of C flowed, and the sine function of the V will act upon current regardless the interval spacing, so really only current or coulombs is being regulated, but still in proportion to instantaneous V?

I think I am misunderstanding. Does the equation posted, suggest that we impede current by an opposing V? K is some multiple needed to reduce delta V to an amount needed to flow the current given by the load R? I feel like I'm over complicating this lol

Per your riddle, Tim, Im guessing the input current waveform and input V waveform match in proportionality and that the constant current on Load side is achieved by a separate process down the line. That while the I wave and the V wave are both sin waves in proportion to each other, that the amplitude of the I wave is in proportionality to the Load current draw or Load constant current? As far as filter cap sizing, im guessing youd need a large one, like you said because C = (I*t)/ripple, and if your ripple is smaller than 1 then your C needed will be large?

Im going to go and learn some more and Ill be back with new questions and hopefully some new knowledge stemming from researching your guys' insight/commentary.



Riddles for the time being lol..

Richard's father has 3 sons, "Snap, Crackle, and ___?"

The more you take the more you leave behind, what am I?

What is brown, has a head and tail but not legs?




unitedatoms:
Power curve will be double frequency sin(t) in shape and always positive, not negative, unless the load is reactive.

dietert1:
Assuming the usual configuration with a bridge rectifier followed by a step-up DC->DC charging a large capacitor at above peak input voltage, you have two aims:

a) Measure and control the input current to be proportional to input DC Voltage, Iin(t) = k * Uin(t). In order to do this you need measurements of Uin(t) (voltage divider) and for the input current Iin(t) (sense resistor). Input current is controlled by changing the duty cycle of the step-up converter

b) Regulate the capacitor voltage at a certain value. This is done by adapting k: increase with load current out of capacitor. There needs to be a voltage divider for output voltage, too.

The controller needs a multiplier and some filters to determine average input current (average over one period of step-up) and keep k roughly constant over one period of mains input. You can find all the details in the data sheet or app notes of any "single chip PFC controller". Nowadays there are digital controllers, too.

Regards, Dieter

TheDood:
Thanks Dieter,

Instead of thinking of it as in reference to storage capacitor level, think of it as in reference to instantaneous load demands?

So I'd sense my load I allowed to flow from storage cap, then find the corresponding mains peak I by setting mains Irms = to equivalent load I (you would have to convert load I to equivalent load I, like you would a transformer, power being conserved?) and then the ratio of (peak V to peak I) multiplied by the instantaneous mains V, can be used to determine time ON per period of sin wave division (sensed and ON till k·V(t)mains was met then off)?

And the sensing would have to be done through a filter so to avoid large V fluctuations in the storage capacitor? Ie if large ripple were picked up by load current sensor it would give incorrect k constant which also needs reseting every 0->Pi sin cycle?

When I'm picking inductors and the switching Hz, do I want the [5·(time constant)] duration to be equal to the minimum load current desired? So that the coil would be fully energized at even the smallest duty cycle%? Or do I want to use the time constant as a regulator, ie setting [5·(time constant)] equal to the entire period?

dietert1:
If you measure the instantaneous load current as well, you can work it into the controller to improve load regulation, but i am not sure it's necessary. Anyway the capacitor needs to be a buffer for some mains periods at high loads, otherwise there can't be PFC. PFC is relevant at loads above 75 or 100 W. The whole scheme is relatively simple because the boost converter works at a much higher frequency, so energy stored in the inductor is always much smaller compared to energy in the capacitor.

Usually there are more converters with better voltage regulation operating from the capacitor. Those regulators should be able to work correctly at reduced capacitor voltage like 300 instead of 400 V.

The inductor is determined by maximum load current and something like half the capacitor voltage as input. It's the most critical situation and then you want a nice triangle modulation without current breaks. With low load some integrated PFC controllers seem to implement burst mode or tricks like that. But that's more about radiated noise and standby efficiency. Again i recommend to study some data sheets. They explain how to dimension the power parts. For low loss the inductor needs to run hot, so it should not sit next to the capacitor. And the boost controller needs a second, very sturdy capacitor on its input side (between bridge and inductor) to buffer high frequency current peaks.

Regards, Dieter

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