Generating 100us timer base & cnt (STM32F205)

[Vindhyachal.takniki]

1. I have STM32F205 running at 120Mhz with external 16Mhz crystal.
Prefetch , Data & Instruction buffer on. timer is clocked by 60Mhz

2. task is to toggle 10 pins with a base count of 100us.
i.e User will enter number in multiple of 100us & I have to toggle the pins.

3. I have timer base of 100us & accordingly I am toggled the pins. In interrupt only 10 variables are incremented. So ISR is very small.

4. System works fine initially but on long run (1 hour or so), I saw some latency keep on adding.

5. This probably due to small time base i.e 100us. It adds jitter & theoretically Cortex-M3 core should always be able to service an interrupt request within 15 cycles
. Is it due to these cycles which accumulate over period of time & generate error.

6. Any possible solution/advise/technical point

[Simon]

interesting, sounds like a problem I had on an ATtiny25 where I wanted to run a mechanical clock that wanted a pulse every 30 seconds, i worked it all out just right running off a 32.768 KHz clock crystal only to find that I had to make the pulse slightly shorter to make it keep time and it was trial and error.

[diyaudio]

timer base of 100us

what timer are you using ? systick? peripheral timer? whats your priority on the ISR? In fact I had the same problem last week whilst studying the F103 timers (jitter experienced during less than 50us interrupts) but then again interrupting systick at "us intervals" are not recommend as it keeps the cpu busy. 

[AndreasF]

Not entirely sure if this will help, but I would remove as much as possible from the actual ISR and only leave in the truly time-critical parts (e.g. toggle the pins). For everything else (e.g. "increase 10 variables") you could raise a "flag" inside the ISR that then gets serviced in the main program.

An alternative might be to use the DMA* for the pin toggling, which could be triggered by one of the timers.


*I'm assuming the STM32F205 has a DMA controller, but haven't checked.

[mikerj]

5. This probably due to small time base i.e 100us. It adds jitter & theoretically Cortex-M3 core should always be able to service an interrupt request within 15 cycles
. Is it due to these cycles which accumulate over period of time & generate error.

6. Any possible solution/advise/technical point

Jitter caused by variable interrupt latency should not be accumulative provided your interrupt is definitely taking less than 100us to completely execute.  Have you actually measured your interrupt execution time? You can't simply assume it's fast enough because there isn't much code in it.

Do you only have one interrupt running?  How does the user enter the toggle rate e.g. via a keypad/LCD, serial link etc.?

Is there any code that temporarily disables interrupts?

[Vindhyachal.takniki]

Problem is solved.
Was some bug in code. Now in 100us base its working fine.