In the simplified top diagram the constant current source Q3 is not biased into conduction, which in turn means Q1 and Q2 are also not being biased into conduction. The lower diagram has additional components R3,R4 and V6 to bias Q3, but from inspection it looks like this would be turning on Q3 far too hard and likely saturating Q1 and Q2. However the node "VM" may play a role in this and I don't see any other matching net names.