| Electronics > Beginners |
| Poles and Zeros |
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| kg4arn:
This lecture series by Roberge is one of great ones, imo. Watching it over and over finally made sense of op amp compensation. His book is long out of print but worth it if you can find a copy. https://ocw.mit.edu/resources/res-6-010-electronic-feedback-systems-spring-2013/course-videos/ |
| rstofer:
The transfer function doesn't just describes the present output versus the present input, it includes history. Whenever you see a term like 1/s, you immediately say "integrator" and integration includes history. Nobody wakes up one morning and says "Hey, I'll bet writing transfer functions in terms of s will get me a solution". We kind of work up to it by, among other things, struggling through Differential Equations and hoping that there is an easier way. Khan Academy has an excellent program on all levels of math. They also have a program on Electrical Engineering. For Laplace Transforms: https://www.khanacademy.org/math/differential-equations/laplace-transform People often complain that they are not good with mathematics. Khan Academy is a way to overcome that when taken in slow doses and working through the quiz problems. As I said earlier, the EE curriculum is packed with math courses. All engineering programs are. Math is the filter on whether you go into engineering or something else. That MIT paper I linked earlier has a lot of good information if it wasn't for all the equations. So, read the thing for the description and worry about the math some other time. Pay attention to the big picture and skip over the details. Figure 2 is especially important: http://web.mit.edu/2.14/www/Handouts/PoleZero.pdf Read the 6 numbered conditions under Figure 2 to get a qualitative sense of what the poles do when they are on the left half, on the axis or on the right half of the complex plane. It's all spelled out. You can see where systems become unstable if there are poles on the right half plane. Read the last sentence of Page 6. The next issue is which circuit elements, in which configurations cause poles and zero and how do they get to the left or right half of the complex plane. Empirically, this is why amplifiers oscillate and oscillators don't. A little tidbit I learned in a Circuit Analysis course a very long time ago. More than you ever want to know about loop stability: http://www.cds.caltech.edu/~murray/books/AM05/pdf/am08-analysis_04Mar10.pdf I'll look around and see if I can find a decent example of a circuit with poles in the right half plane. The idea of cancelling a pole with a zero simply means that both the numerator and denominator have a common factor which can be cancelled. From Algebra I, thankfully! Bottom of page 43 gets down to it: https://www.springer.com/cda/content/document/cda_downloaddocument/9783319279190-c1.pdf |
| IconicPCB:
My control systems lecturer used to present a problem , speak of "gut feel" about the performance and then bring on the analytic solution and link the two. Anyone who has gone through a graduate degree will recall the intense mathematical content of at least first two years of the course and how the tools provided by the maths subjects married into the engineering topics. On the question of "1/s =history" If above statement makes no sense just remind Yourself of natural and forced solution to a differential equation. |
| IanB:
--- Quote from: rstofer on June 16, 2018, 10:27:12 pm ---That MIT paper I linked earlier has a lot of good information if it wasn't for all the equations. --- End quote --- I really like that paper. It is a model of clarity and certainly addresses my questions. Thank you for linking it. |
| IanMacdonald:
Basically, for any given opamp there is a fixed time delay between a signal being input and arriving at the output. This is mainly due to R/C time constants in the signal path, created by parasitic capacitance in transistor junctions etc. Mostly we want less than the max gain, so we apply negative feedback. As signal frequency increases, the inherent delay becomes a larger proportion of a signal cycle. When it exceeds half a cycle, the negative feedback becomes positive feedback.. and all hell breaks loose. There are two ways to alleviate that; to ensure that the gain (of the amp itself) falls to unity or less before the critical frequency is reached, or to apply phase advance (differentiation) to the feedback signal to cancel out or reduce the timing error caused by the delays. Sometimes termed lag compensation, or lead-lag compensation respectively. Since a unity gain application has the most feedback, this is where the problem most likely arises. It's not so much a question of stage gain as of whether the overall feedback is reinforcing instead of reducing, to HF signals. The more feedback, the more likely that will be. Most general purpose opamps have a simple lag compensation capacitor which reduces the open-loop gain as frequency increases. This is actually too much compensation for a high gain application, so it's basically a compromise arrangement. As to working out what values to use, sorry but that does require all those funny squiggles. Or else just try and see. Which I suspect is what's used in most cases. Square wave testing will typically show ringing or overshoots if the stage is undercompensated. http://pbfcomics.com/wp-content/uploads/2016/09/PBF267-The-Breakthrough.png HTH. |
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