EEVblog Electronics Community Forum
Electronics => Beginners => Topic started by: Wilfrid2000 on July 07, 2023, 02:16:28 am
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I would like to ask a basic question, Figure 4.3 is a common serial PRBS, if you want to generate parallel PRBS such as Figure 4.4.
But if you want to parallel 15-bit PRBS, why are not seen directly as shown in Figure 4.3 red line, pull out the output of each DFF, the same is m sequence, just a delay a clock
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You are answering your own question - those bits would not form a random sequence, it will be just a sequence of bit-shifted numbers.
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Thanks for your reply, but if I give each DFF output to a different channel in Figure 4.3, is this a random sequence for each channel?
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If you just take the output as you are describing, then you will get a sequence for the first 15 bits. But then to get the next 15, you need to wait for 15 cycles until all the old bits get flushed out.
I assume the goal is to get the next N bits from the sequence without waiting for N clock cycles.
Can you post what is in the Figure 4.4?
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Sorry, Figure 4.4 has been uploaded, I may not be clear in the description, I hope that as in Figure 1, each DFF output corresponds to a channel, for example, DFF1 output to channel 1 to generate PRBS, this is equivalent to each channel can receive PRBS.
Like Figure 4.4 parallel 32-bit PRBS15 sequence generator circuit, which represents the desire to generate 32-bit PRBS in one cycle, and then convert it into a sequence by multiplexer to give a channel for testing?
My goal is to give multiple channels, I wonder if the method in Figure 1 can be?
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There is no such thing as a "parallel PRBS".
As PRBS means p* r* b* sequence, which means serial order.
What exists are the serial and parallel topology to create PRBS, but that are basically just two different circuits to create the same serial order of pseudo random bits.
What you can do is create several different PRBS of same length or of different lengths and output them in parallel.
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My goal is to give multiple channels, I wonder if the method in Figure 1 can be?
With your proposal you will get N independent outputs that generate the same sequence shifted in time relative to each other. If this is enough for your testing, then it will work.
The goal of the parallel circuit is to output N bits from the same sequence on each clock cycle.
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Thank you both for your replies, I have understood! :D :D