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| Purpose of this amplifier circuit with op. amplifiers |
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| vealmike:
--- Quote from: Yansi on February 04, 2019, 04:30:35 pm ---Stacking multiple stages with low gains each makes sense. Stacking them directly like will improve close to nothing, just raise problems with stability. --- End quote --- Au contraire, it will work beautifully on the simulator. If you wanted to teach students about the pitfalls of assuming simulated circuits will always work, this would be a fine example to pick. |
| Zero999:
--- Quote from: vealmike on February 05, 2019, 09:35:46 am --- --- Quote from: Yansi on February 04, 2019, 04:30:35 pm ---Stacking multiple stages with low gains each makes sense. Stacking them directly like will improve close to nothing, just raise problems with stability. --- End quote --- Au contraire, it will work beautifully on the simulator. If you wanted to teach students about the pitfalls of assuming simulated circuits will always work, this would be a fine example to pick. --- End quote --- That depends on how accurate the models are. |
| vealmike:
Fair point. If they accurately model the parasitics (including supplies), noise and shonky soldering in the breadboard / veroboard lab model, the simulator will give the correct result. But generally people just use the same schematic for both sim and lab build. |
| nick_d:
The link to the 50W/channel composite amp is golden. If I was going to build a class B amp I would definitely build it like this. Actually, it's sort of logical because it makes sense to drive the power stage with an op-amp IC rather than building your own driver stage. The fact that the power stage is designed to work as effectively an op-amp, is just an added bonus that makes this circuit a lot cooler. In regards to the stability issue, yes certainly if you put two very quick devices in series and an overall feedback loop around them, it's a recipe for oscillation, since the devices will respond to the input in open-loop fashion before the feedback arrives. There are two main ways around. One way is to slow down each of the individual devices (give each one its own feedback loop, inside the overall feedback loop). Another way is to generate the feedback signal as some function of both op-amp outputs, so that there's a "quick" feedback coming from the first op-amp and a slower feedback coming from the second. I've done a bit of this before while trying to generate stable feedback loops and integrators for sigma-delta converters. Honestly the maths does your head in a bit, but in principle the response of the circuit can be calculated by complex analysis. Given some frequency (omega), you can calculate the gain and phase shift of the amplifier in the same way you would calculate the DC gain, except using impedances instead of resistances, and obviously giving any capacitors or inductors their correct impedances, which will be imaginary and will depend on omega. You just have to make sure the gain is <1 when the phase shift is in the 90..270 degree region. The correct feedback components will ensure this. I tend to use a trial and error approach, with either Spice or Matlab or Python with Matplotlib... so that I can easily change components and then graph the response of the circuit as a frequency-vs-magnitude and frequency-vs-phase plot. There are other plots such as the Bode plot and the pole-zero diagram, which I'm honestly not as familiar with, but can be used to read off stability information if you know how. (I try to avoid using too many different kinds of plot though). cheers, Nick |
| Zero999:
--- Quote from: vealmike on February 05, 2019, 10:33:58 am ---Fair point. If they accurately model the parasitics (including supplies), noise and shonky soldering in the breadboard / veroboard lab model, the simulator will give the correct result. But generally people just use the same schematic for both sim and lab build. --- End quote --- The problem with using two op-amps in the same loop is the delays add, so there's an increased risk of the gain being above unity, at 180o phase shift, resulting in oscillation. You're mistaken that this won't show in a simulator. With the appropriate models, it's fairly straightforward to use SPICE to predict if it will oscillate or not. Whether the parasitics make any difference or not depends on the impedance and bandwidth of the circuit. If low value feedback resistors, say under 100k or so, are used and the op-amp is slow, such as the old 741, the parasitics will make little difference and the simulator should closely match reality, unless the construction is extremely bad. Attached is a simulation showing four different inverting op-amp configurations with a total gain of 100. The simulation clearly shows the one with the two op-amps in the same loop, #2, will oscillate. Using two separate amplifiers in series, #3, is the most stable configuration, but will have a higher offset error, as the second amplifier multiplies the firsts offset. Local feedback with two amplifiers in the same loop, #4, gives a much better offset a and a wide bandwidth, but selecting the value of the compensation capacitor is tricky: too low = oscillation, too high = less bandwidth. I've tweaked it in the simulation, but in real life err on the side of caution and keep it on the higher side: only design for as much bandwidth as you really need. |
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