Put LC filter before or after LDO?

[antercreeper]

Put LC filter before or after LDO?

[mawyatt]

Before LDO, this reduces higher frequency "noise" before it enters the LDO.

Regulators typically have a weaker rejection response in the PSRR at higher frequencies, usually meaning a rising response vs frequency to injected "noise" at the input.

Best,

[Kleinstein]

For the simple linear PSRR it would not make a difference if the filter is before or after the LDO. However for the high frequency part there can also be some demodulation effect: RF signal can be demodulated to a change in the DC voltage.  Another advantage of the filter in front of the LDO is that the regulator also compensates for drop at the filter and the resistance of the filter is thus less relevant.

[T3sl4co1l]

To do what? -- what noise is being filtered?  What's it coming from?

To what extent? -- how much filtering is actually required?  What's the load?  Also, why drop 0.3V, is that really so important?  If so, could the 3.3V supply be turned down to suit both?  What are the tolerances?

The filter is probably fine, but I would go with an electrolytic or tantalum, or add ESR, to dampen it.  Ceramics have very low ESR, ensuring a high impedance peak where the LC resonate.

Tim

[AnalogTodd]

What nobody has addressed yet is a major concern: regulator stability. A capacitor is needed on the output of almost every linear regulator to provide a pole for stability. For a regulator like this, the pole is formed by R_L*C_OUT.

When you add an LC on the output you create a double pole at the LC resonant frequency. If this happens to be before the unity gain frequency of the regulator, you get a 180 degree phase shift while you still have gain, leading to oscillation.

[LooseJunkHater]

What nobody has addressed yet is a major concern: regulator stability. A capacitor is needed on the output of almost every linear regulator to provide a pole for stability. For a regulator like this, the pole is formed by R_L*C_OUT.

When you add an LC on the output you create a double pole at the LC resonant frequency. If this happens to be before the unity gain frequency of the regulator, you get a 180 degree phase shift while you still have gain, leading to oscillation.

So essentially, it's generally a bad idea to place a LC filter after an LDO, unless you measure and check for oscillations?

[T3sl4co1l]

Generally? I wouldn't go that far. An undamped/unterminated LC? Yes. In front as well.

Tim

[AnalogTodd]

What nobody has addressed yet is a major concern: regulator stability. A capacitor is needed on the output of almost every linear regulator to provide a pole for stability. For a regulator like this, the pole is formed by R_L*C_OUT.

When you add an LC on the output you create a double pole at the LC resonant frequency. If this happens to be before the unity gain frequency of the regulator, you get a 180 degree phase shift while you still have gain, leading to oscillation.

So essentially, it's generally a bad idea to place a LC filter after an LDO, unless you measure and check for oscillations?

Absolutely. I've had far too many people contact me before for an application where they aren't getting the right output voltage. I have them hang a scope probe on the output and it is oscillating and once I get to look at the schematic I see an LC filter with a resonant frequency well inside the regulator bandwidth. Pull that off and everything is happy.

Push the frequency high enough it is outside the loop bandwidth and it will work as well.

[Nominal Animal]

The TI TPS7A20 datasheet recommends 1µF input capacitor and 1µF–200µF output capacitor with less than 0.1Ω ESR (C0G, X7R, or X5R type).

It seems to me –– but I'm only a hobbyist myself –– that say 10µF on output, and 1µF and a ferrite bead on input, would work well.  Datasheet figure 6-64 shows that using 10µF on the output helps better power supply rejection ratio (PSRR, ie. rejection of supply noise to the input side of the regulator) around 1 or 2 MHz.

I usually power my own circuits from USB 5V, and that has a limit of maximum 10µF capacitance; so, I tend to use regulators that tolerate sufficient capacitance on the output to give me stable voltages.  For ADCs and similar having their own supplies, I like to use a ferrite bead to absorb/reflect the high-frequency noise (say, above 10 MHz).

In this particular case, doing a quick .ac oct 100 1K 1MEG simulation in KiCAD/ngspice, simulating the latter filter with a 10Ω load (for 300mA current at 3V, VSIN dc=3 ampl=0.1 f=1k ac=1), shows 16.7 dBV gain (6.8× amplification) peak at 23 kHz.  It only becomes worse with lesser output loads: at 3kΩ (1mA load at 3V), the gain is over 47.3 dBV (230× amplification).  This makes the filter amplify noise between 5 kHz and 35 kHz or so, especially at low loads.  Now, I could easily be wrong here, so I hope more experienced members will pipe up, but to me, it looks like maybe the Pi filter is not what one actually wants or needs here.

[Manul]

Generally you want overdamped RLC, but the internal resistance of inductor and capacitor is often too small. So you want to add some extra R. The problem in this case is that there is no place for extra R, because voltage margin is so small. If you would have say 1V or 2V margin, then you could easily add extra resistance and have a nice filter with no peaking. But it will exhibit voltage drop. More capacitance also helps. Placing filter at the input side is better/safer if you are not 100% sure of what you are doing.

[antercreeper]

I have tested(filter in front of the LDO)
And result is I need to add more output capacitors maybe 10uF or more, because the load generate ripples on the output(about several millvolts). while the load is shut down and ripples are gone. (In fact I think the biggest reason is MLCC's capacitance degraded by DC bias  I forgot this and mess all things)
maybe later I can change the input filter capacitors from MLCC to tantalum one, but by now haven't observed any problems.

[MathWizard]

I usually power my own circuits from USB 5V, and that has a limit of maximum 10µF capacitance; so, I tend to use regulators that tolerate sufficient capacitance on the output to give me stable voltages.  For ADCs and similar having their own supplies, I like to use a ferrite bead to absorb/reflect the high-frequency noise (say, above 10 MHz).

So do mean for a typical +5V rail of a USB outlet, some spec says 10uF is the max capacitive load at some frequency? Surely I've seen much bigger caps on the input of USB devices.

[Manul]

I usually power my own circuits from USB 5V, and that has a limit of maximum 10µF capacitance; so, I tend to use regulators that tolerate sufficient capacitance on the output to give me stable voltages.  For ADCs and similar having their own supplies, I like to use a ferrite bead to absorb/reflect the high-frequency noise (say, above 10 MHz).

So do mean for a typical +5V rail of a USB outlet, some spec says 10uF is the max capacitive load at some frequency? Surely I've seen much bigger caps on the input of USB devices.

Yes, there is such spec for maximum capacitance. Frequency does not play here. Capacitance ceiling is meant to limit inrush current. There are a couple of reasons why such spec exists.

USB is designed to be hot plugged, so a high (and long duration) inrush current may cause momentary voltage dip on the entire bus, thus resetting or otherwise affecting other connected devices. Minimum bus voltage by spec is I believe 4.75V, so there should be no dips below that during hot plugging. Even one step further - it is possible that a high inrush may simply trip bus overcurrent protection.

Second reason is durability of connectors. Type A might seem like a fairly robust one, but mini B and micro B are real tiny. Those pins are certainly not designed with sparking in mind and will deteriorate quickly during hot plugging if inrush current is high.

Similar thing exists with boards meant for hot swapping, for instance, CompactPCI boards. They have hot swap controllers which control power rail inrush and usually also precharge I/O lines, so there is less glitch when you insert a board into a powered, working system.

Sure we live in a free world and rules can be broken, but it usually comes with consequencies.

[Nominal Animal]

for a typical +5V rail of a USB outlet, some spec says 10uF is the max capacitive load

Yes, as Manul wrote above.

If one wants their USB device to work with all sorts of USB hosts, then 10µF input capacitance should not be exceeded.
That does not mean that higher input capacitances won't usually work.

Surely I've seen much bigger caps on the input of USB devices.

Me too.  In fact, for very power hungry devices on tiny SBCs (where the USB bus voltage is the internal 5V rail), extra capacitance can add stability.  For early 3G USB 2.0 modems having exactly such issues, Olimex created USP-CAP, with 2000µF bulk capacitance between USB +5V and GND.

However, using such a device will surely trip the overcurrent protection due to initial inrush current on most modern desktop and laptop devices.