Are... we talking about the same PDFs here? Because I don't see a "16" on page 522, and I don't see 15mA or -8V anywhere.
The trick is Fig 19.8. Which is horribly cartoony, so let's look at a *real* one instead!
https://www.fairchildsemi.com/datasheets/MM/MMBFJ112.pdfFig.3 (Id vs. Vds for given Vgs). See how at Vgs=0, it, well... it's off the graph unfortunately. But it should level off around 2V, because Vgs(off) = -2V. At Vgs = -1V, it's leveled off around 1V. And at -1.4V, it's around 0.6V... (it looks like 0.4V even, but it's hard to say at this resolution).
The current saturation voltage* decreases with Vgs; indeed it's Vdg which defines that point.
You didn't mention what Vgs the example is/should be biased for; if it's near pinchoff, it may very well be in the current saturation region. But if it's just "grid leak biased" (resistor from gate to ground, signal coupled in via capacitor), there simply isn't enough supply voltage in the circuit, regardless, and as you note -- it must be in the ohmic region somewhere. Which isn't necessarily a bad thing, but that will reduce voltage gain (not usually desirable), output resistance (maybe not entirely bad?), and make it a whole lot more complicated to solve for the biasing conditions (because now source current depends on drain voltage, which depends on G-S voltage, which depends on... oh boy..).
(*I want to be specific and always use "current saturation" when referring to the constant-current region of JFETs, because in
every single other device in existence, saturation has referred to voltage saturation (the JFET ohmic region). Why, and WHO, decided to come up with this bit of madness... I have no idea.

)
Tim