You're welcome!
If you're willing to take the discussion a bit further, I'm curious about the use cases for snubbing, clamping, and edge rate tuning in the context of a MOSFET switching circuit. When should one solution be used over another?
Depends on range in load (current and impedance), energy dissipation required, efficiency, and all the other things like size, cost, EMI and so on.
No snubber at all, is usually acceptable for a tight layout with modern transistors. Switching is reasonable to fast, and the extreme change in Coss with Vds provides a similar effect. Layout must keep inductance low enough not to mind; which can be difficult when THT transistors are ~7nH a pop, plus routing.
7nH might not sound like much, but two of them back to back, with a bypass cap right beside them, is easily 20nH. If Coss ~ 1nF, the resonant impedance is sqrt(20nH / 1nF) ~= 4.5 ohm, and frequency 1 / (2 pi sqrt(20nH * 1nF)) ~= 36MHz (1/4 wave in 7ns). A risetime under 15ns will show peaking or ringing. The ringing can be damped with an RC in parallel with each transistor (R ~ 4.5 ohm and C > 1nF), but the network has to have much less than 20nH to be effective, and it's already at a disadvantage being placed at the bottom of the 7nH lead length of each respective transistor.
To make that clear, in a half bridge inverter there are the following 1st order parasitics:
Q and D are the two switches; obviously a D has passive function, but all that matters is that one or the other (or both, or neither, as the case may be) goes between a reasonable open circuit, or short circuit. "Reasonable" meaning, an impedance much much higher or lower than the surrounding impedances.
So, if the loop impedance (Ls + ESLin with Cq or Cd) is around 4.5 ohms, on resistance should be much lower than that, and off resistance much higher. Which if these were say 600V 20A transistors/diode, figures like 100mohm and >>10Mohm would be typical, so, yeah.
Ringing magnitude is determined by load. At no load (Io = 0), the output voltage just sits around between switching events, and when one or the other device turns on, it starts at full Vin and pulls down to ~0 across itself. This discharges its own capacitance (dissipating immediate switching loss), and shorts Vin across the remaining series resonant tank, (ESLin + Ls) + (Cq or Cd).
If we assume the device switches instantly, then the voltage across that inductance starts at Vin, swings to zero and reverses, and so on, ringing down. Meanwhile, the current through the loop starts at zero, peaks at Vin / Zo (say for 400V and 4.5 ohms, 89A), then down, reverses and so on.
With no load and ideal components, only Rds(on) dissipates energy, which if Rds(on) = 0.1 ohm, the Q factor is (4.5) / (0.1) = 45, it'll ring like a bell.
In practice, Q or D probably doesn't switch quite as fast, and the amplitude will be somewhat lower. Or, if your loop inductance is much higher than this, well, now you can see the problem!
Conversely, if load current is high at the instant of turn-off, Q's voltage drop starts at zero and its current starts at Io. (We assume Io is constant during commutation -- typically, it is a much larger inductance than Ls and friends, and this will be the case.) Cq charges, and Cd discharges, by Io. Quickly, current starts to divert from Ls, into ground -- this change in current excites the series loop in the same way, and we get a peak voltage around Io * Zo. Which if that was 20A and 4.5 ohms, is only 90V, not bad.
Which might look a lot like this, using exaggerated capacitance to show the effect:
Notice that commutation is
so long that the load current is noticeably rounded off, rather than being a nice sharp triangle wave! You can also see just a little blip of ringing at each turn-off event, as current is transferred from the respective switch, to the snubber capacitor.
The ripple at the top and bottom of the trapezoid, by the way, is that change in current propagating through the supply network. The supply is not simply a capacitor with some ESL, but some ESR and maybe higher level structure as well, connected to other capacitors in turn, through wires (and in turn, inductances!). This can make a complex network, even a lumped-equivalent transmission line -- and in the same way, we seek to dampen that network by putting some resistance on it. Typically, a bulk capacitor with Cbulk > 3 * Cfast and ESR = Zo provides this. Electrolytics are lossy capacitors: a curse and a blessing, they can be used to provide this function in addition to handling modest ripple currents (a few amperes for something of suitable rating in this example) and providing current inbetween mains cycles (mains filtering or PFC).
So, we can have a situation where ringing is worst at no load, and better under load. Or maybe we have a converter with enough load inductance on it by default, that it sits in the ZVS regime (like the above waveform), but as load current increases, ringing also increases. In general, there's a parabolic curve of losses, as you go from capacitive load (current lags voltage: when a transistor turns on, it "yanks" the load down), to resistive to inductive load (voltage lags current: when a transistor turns off, voltage swings across to the other side which "catches" it -- in a dual transistor half bridge, we use MOSFETs which have intrinsic body diodes, or IGBTs with co-pack diodes to provide this function). Under a capacitive condition, hard turn-on switching occurs, and losses are driven by the voltage swing into the capacitances; under an inductive condition, hard turn-off switching occurs, and losses are driven by the current swing into the stray inductance.
It's a tradeoff; a good design balances both. It can indeed be fruitful to intentionally increase Cq/Cd or Ls to achieve this -- mind, this will typically be done in combination with a snubber, to limit the consequential peak current or voltage. This is always more true as time goes on.
Common advice is to simply "minimize inductance" and leave it at that, but I think that advice was written back in the days of slow BJTs and early MOSFETs: when you have 200ns+ to wait on the voltage or current changing direction, it doesn't much matter, you can get away with a lot. (Most power supplies used single layer PCB back then... for that matter, they still do, too!) Already in "old" history as electronics go (80s-90s), we had cheap and plentiful MOSFETs, fast enough to make one question that advice. Since the 2010s, we've had them fast enough to handily violate that; and now that we have SiC and GaN MOSFETs widely available, with sub-ns switching times possible, it's utterly unavoidable!
To wrap up this line of thought: what you're really optimizing is, getting Zo to a modest fraction of Zsw (for Zsw = Vin / Io(max), say), so that Vpk and Ipk are only modestly above Vin and Io(max); and getting the 1/4 wave time shorter than the switching time. If you can't meet these by adjusting Ls and Cq (through layout and component choice), then consider raising t_sw. If you can't (because of efficiency spec, perhaps), next best is seeing if a damper (R+C) or snubber (RCD?) can do. If not (because its own stray inductance is comparable?), you're really kind of stuck, and will have to adjust something else in the design (like not being so aggressive with the high switching frequency, or choosing a different device family (GaN over Si?) or topology (resonant over pulsed?)).
Oh, and to clarify this fact: inductance and capacitance are proportional to distance. The physical constants μ_0 and ε_0 are in units of H or F per meter; when we calculate an inductor or capacitor, we use the cross sectional area divided by its path length (just as you'd determine the resistance of a cylindrical wire*). Or if the cross section is already known, as for a transmission line, it reduces to a geometry factor, and we can find L and C quite easily by just multiplying the constants by the geometry factor and length. (The inductance and capacitance per length is often given in cable datasheets, or we can calculate the geometry factor from Zo and velocity.)
*Mind, EM fields don't usually have such simple shapes, and we have to integrate over space to solve for the total. We might express the result as an effective area A_e and an effective length l_e. For magnetic paths mostly constrained within a permeable core, this is a useful method, and hence you find exactly these parameters in datasheets of cores.
So back to the snubber. The earlier post mentions a flyback converter, which means Ls is effectively the leakage inductance (LL) of the transformer. This can be sizable, so it depends. I forget what the windup was in that example; probably the primary and secondary are interleaved a few times, keeping it fairly low? (Transformers are just transmission lines in action, again: anywhere you have two wires side by side, you have some inductance and capacitance between them! Note, this is between the windings themselves (or between wires in each winding, for that matter), independent of the core -- this is different from magnetizing inductance.)
The dV/dt rate snubber is a good choice here, as it improves the transistor efficiency somewhat, and the amount of energy it has to handle is modest (because of the low LL transformer design). The load is highly variable (peak switch current proportional to load current, more or less), so some compromise may be necessary, and it will affect efficiency at light load (where very little energy is coming out of LL, but the RC is still charging and discharging the full, whatever energy C holds at Vpk).
If the transformer were leakier, the compromise for a dV/dt snubber would be too great: to keep peak voltage down, the ramp rate might be impractically low even at full or half load, let alone at light load -- where it might not ramp up at all, fully absorbing (snubbing) what should be real output voltage! In other words, at low enough throttle, the peak output voltage doesn't even reach the desired level (say for a 12:12V converter, it might be below 12V peak, even at zero load current), because it's all being burned in the snubber. So, we might prefer a peak clamp snubber in this case: it still has to dissipate the leakage energy, but at least some still gets to the load, and who knows, there's a glimmer of hope we could still do something with that energy (the clamp node is basically a DC boost supply, we could add an auxiliary converter and "stir" it back into the supply from whence it came.. if we didn't mind, you know, adding a whole-ass 'nother converter).
There are also quasi-resonant snubbers, which tend to exhibit higher peak currents or voltages, and have more limitations (they're harder to apply, and not as efficient as one would hope), but can be useful when everything lines up just right.
This is probably rather abstract just hearing me talk about it, and not even putting numbers to it -- but it's easy to see in a simulation; and a good exercise to set up, really -- in fact, one could spend weeks, or, years honestly, simulating various aspects of these networks to get an intuitive feel for them. (I ran many simulations in the, hmm, 2008-2012 span or so, building my understanding in just this way. It feels so natural now, it's easy for me to forget how long it's taken to get here!)
Oh, another thing about edge rate -- a side-effect of Coss(Vds) being so nonlinear, the dV/dt of a bare transistor can be very high indeed, and doesn't even track very well with gate resistance -- because Crss (Cdg) is so small in that range, Miller effect may not be the dominant limitation. Indeed, for these types, the Miller plateau is mostly the first 10 or 20% of drain voltage swing. Which, like I said before, the switching loss on these types can be relatively low, and this is the mechanism behind it: if most of the time spent dumping charge into/out of the gate is done at low Vds, then the power dissipation will be low as well.
So, when you actually
want controlled edge rates, it may even help to add Cdg. Be careful here: it shouldn't take much (10s, 100s pF?), and it should probably have a series resistor to prevent oscillation (say, >10 ohm). (MOSFETs with low-ESR capacitors across pairs of terminals, tend to oscillate at 100s of MHz. I've personally made some SPA07N60C3 oscillate ca. 400MHz by putting a protective zener diode (1N4742) between source and gate. They don't have much gain or power up at those frequencies, but it's still more than enough to blot out nearby TVs!)
You can also consider whether to limit the rate of voltage, current or both. Current is done by source degeneration: the classic common-emitter (or source, or..) amplifier puts a resistor between this terminal and ground, and this simply limits signal gain (transconductance). Use an inductor, and gain drops off at high frequency. We should probably use a damped inductor, so an R || L or ferrite bead is a good option. Not that we'll be limiting the rate too too much: it would have to be a fairly large inductor to get microseconds of ramp time. This is usually used to just "take the edge off", and that's good enough for emissions purposes -- particularly radiated emissions in the >= 30MHz range.
And you might again come to the same question: which is better, and how much? Well, we've got a ratio of voltage and current, an impedance; so we might consider the load impedance and how that relates to our switch. I don't know that I'd take it any further than putting in a few ferrite beads and R+Cs, honestly, but if you happen to need really clean switching, or specific waveform generation, it's certainly something to consider.
And it has been done, after a sort, in IC form:
https://www.analog.com/media/en/technical-documentation/data-sheets/1683fd.pdfHere, they're using active circuitry instead of passive components, and probably some quite clever solutions at that to work around the fact that it's driving an, in general, completely unknown transistor -- but what's impressive is that they did it at all. But hey, LT doesn't disappoint.
Using my PWM dimmer as an example, this circuit doesn't really require a fast switching edge. By tuning the gate resistor, I pretty much eliminated the Vds spike to a reasonable level. The overshoot reached something like 70-80 V at 100 ns rise versus 30-40 V at 3-4 µs rise. (Just speaking in generalities; results based on testing with a load resistor, not the LED strip with the diode drops.) In this situation, one could probably argue that clamping/snubbing isn't really necessary. The MOSFET doesn't experience any undue thermal effects from the slower edge and the circuit performance seems okay.
So, you'll see more spike with more cable length -- again, length is inductance. I...did you mention length and I forgot already, or did you not mention? Anyway, something like 0.6 uH/m is a good starting guess for cable, and that includes whatever length of the strip is, or Idunno, maybe half of it on average since (..if?) it's the paralleled-strings kind.
When is the slower edge not an appropriate technique to lessen the overshoot? Is it still good practice to include a clamp or snubber even if voltage spikes aren't observed under normal test conditions?
For an inductive load, switch current is constant (see above reasoning!) until the voltage ramp stops, and then current ramps down. The product of both is a triangle: V*I with I constant and V ramping is one slope, V*I with V constant and I ramping is the other slope. So, full switching time, times peak voltage times peak current, divided by 2, gives the switching energy. (Area of a triangle is width * height / 2.)
For a resistive load, current and voltage ramp at the same time, so the power is a slope squared: a parabola. The area of this happens to be the same factors, divided by 3 instead (hurray for calculus you can do in your head!...well, sort of).
Another way of putting it is this: you're driving the transistor slow enough that the load looks, at least somewhat resistive, maybe still a bit of a mix (still with a bit of peaking, but much less than full speed). This suggests a time constant, t = L/R, which the switching should be similar to or slower than. So, if you know R_L and Ls, you know t.
Anyway, switching energy first of all needs to be less than the one-shot energy dissipation of the device, of course. If it's switching regularly, you need to add up enough of them to get the average power: simply multiply by switching frequency to get this.
So you have roughly:
Psw = t_sw * Vin * I_L * Fsw / (2 to 3)
This, plus conduction loss, gives total switch dissipation.
Your dimmer doesn't need to run too fast. ~100Hz would be just adequate for static visual flicker, but you will definitely see it pulsating out of the corner of your eye, or when making head/eye movements -- I'm particularly irritated by those damn pulsing tail lights so many cars have, when driving at night: they briefly leave a streak of dots in my visual field, did no one stop to think maybe this was a terrible idea?! -- but a few kHz will be challenging to see even with rapid movements.
So, you can afford quite a bit of switching loss, and this isn't a bad way to handle it. I would put on the TVS for protection, probably an RC anyway just to provide some damping (whether or not I'm exciting much oscillation -- still a good precaution for EMI, as even the fractional mV feeding through from the large gate resistor can be sensible on a radio), and that's about it. Maybe current limiting/protection too, for higher reliability (accounts for possible shorted load or cross-wiring), depends on circumstances.
Lastly: if we specifically consider ringing, how does one decide if the oscillations need to be addressed? By measuring EMI at the resonant frequency? In the second-to-last picture that I posted above, my PWM circuit had some ringing, which I mostly corrected with the RC snubber. Let's say this was a real product... how would a designer decide to include--or not to include--the snubber?
This is probably getting way into the weeds for a hobby circuit, but I like best practices.
Heh, well -- the full monty is, put your setup inside the test chamber, set it up under typical operating conditions, and see how much it's giving off. Radiation depends on magic lengths of wires (odd multiples of 1/4 or 1/2 wavelength), so, who knows; you could just get terribly [un]lucky and have a setup that doesn't radiate at switching harmonics! More likely, there are bands, clusters of harmonics that radiate visibly (exceeding threshold levels, or otherwise). You start probing the circuit to see what's related to these emissions, and bring it down. An exact analysis is rarely necessary, and the root cause might be idiomatic. (Many products pass after a handful of engineers and techs stuffed them full of ferrites, bypass caps, shields and so on. Lab time is expensive, and it's whatever works in those days/weeks you're scheduled for!)
More particularly, it is often related to ringing oscillations. In the example I started with, a loop resonance at 36MHz, would show up as a peak of some breadth around that frequency. How broad, depends on what the switching waveform is; if it's stable and periodic, it'll be a cluster of harmonics filtered by that resonance, and whatever else is coupling it out of the circuit (say, some capacitance to the heatsink, then through power/ground wires?). Maybe it'll have extra peaks, as the loop resonance is split* with the resonance of other bypass or EMI filtering caps; maybe it has other peaks or clusters, due to other resonances in the circuit (maybe the heatsink isn't perfectly grounded, and resonates around some other frequency range as well?). It may look like a forest of harmonics, or if the signal is modulated (PWM varying with some variable load, or FM for spread spectrum, or a non-PWM control like quasi-resonant BCM, or fixed on-time) it may just kind of blur together on the display.
Oh uh, that'd be a spectrum analyzer display, by the way.
*If you couple two equal resonators together, the total frequency response is not simply the product of both; under light coupling, that's about right, but above a critical point, the peak splits into two peaks some distance apart. Under very high coupling, say you have a 1:1 transformer with equal caps on both windings -- the equivalent circuit looks like two caps in series (one total equivalent), in series with the leakage inductance; this gives the upper resonance. The lower resonance is the two caps acting in parallel (as you might intuit) with the magnetizing inductance. This is a good example as we can vary the coupling of a transformer; when k ~ 1, LL << Lmag and the resonances are far apart. When k ~ 0, the primary and secondary tanks act independently (and LL isn't a very meaningful quantity as it tends off to infinity in this limit).
This is easily seen (but probably not so easy to intuit in terms of a frequency response or spectrum!) in a demo with multiple pendulums hanging from a common bar, etc. In the time domain, the transient response (i.e. starting everything at some initial offset, and letting them swing down) has energy coupling from one to the other, alternately; the waveform at any given resonator is a sine wave with a sine wave envelope (amplitude modulated). Well, an AM wave has the carrier and two sidebands, and therein lies your answer: the ringdown waveform is two peaks at those sidebands. (It's actually AM DSB-SC, i.e. the envelope is not just a magnitude, but signed as well, and the carrier is null. If you look closely, when one pendulum stops, it actually reverses its relative timing, and as the envelope approaches zero, it approaches then grows quickly -- it's the zero crossing of the signed, sine wave envelope.)
So, add Fourier transform to the reading materials.
Back to the ringing; damping will bring down the levels of that 36MHz peak, but also broaden it; and it won't do anything about the loosely coupled resonances at other frequencies. The only way to reduce those levels, is to reduce the energy at those frequencies in the first place, i.e. not switching so fast (reduce dV/dt and dI/dt), or reduce coupling (use a smaller transistor on the heatsink, or an on-board device instead of a chassis mounted one?), or increase shielding (better grounding, add actual shields?).
Or filtering, of course; some things are just inherently dirty, and are easier to clean up afterwards. SMPS are something of a poster-child of this: a square(ish?) wave is required for high efficiency, and so are the harmonics. Just put more shielding around it, and filter the signals going through those shields.
Automotive is the same way: you've got explosions going off inside the engine, what the hell are you going to do about it? The engine block itself is heavy metal, sure, but there's still some clicking and sliding audible through it, and heavy acoustic pulsations through the intake and especially exhaust. These have to be filtered, usually with some combination of tubing (acts as a series inductor) and accumulator (tank, chamber or resonator; acts as a shunt capacitor or resonant trap). Which can, in turn, be loaded with absorbent materials (perhaps fiberglass batting, or also the catalytic converter and air filter act as series resistors) to dissipate more acoustic energy. A lot of engineering goes into just the right resonances to tune for power (because of course the input and output matching networks affect engine efficiency; the whole thing is a mess of a self-excited oscillator, simple in principle, but so, so chaotic when considered in any kind of detail!) while keeping noise down for both passengers and pedestrians.
Or even heavy metal itself isn't a huge barrier, if the noise source is stiff enough (low mechanical impedance, shall we say). A lot of cars have straight-cut gears in reverse, and the sound of those gears meshing (probably more particularly, the oil squirting around them) is what gives the distinct humming-whirring when backing up. Some cars even had it in forward... rough times, they were... Gears are mounted rigidly to the casing, which vibrates with them. Only solution is to block those surfaces from radiating acoustic energy into the air -- sound deadening to absorb it at the source, or shielding to hold it inside. (So, transmissions mostly use helical cut gears, and nearby body panels have acoustic matting to absorb vibration and road noise. Which also deadens the panels themselves, so they don't resonate as much -- they still carry outside noise when struck, but it's more a dull 'thud' than a resonant gong.)
Or if you prefer a hybrid example: electric motors with a lot of cogging (fans are often good examples..) also give pulsating torque; torque is average forward, but it's just that it's varying at all, is enough to have some acceleration in whatever's attached, the frame and fan blades, or the housing of a power tool, etc. Power tools, DC/universal motors are a big offender, not just because of their pulsating torque but also the very rapid clack-clack-clack of the brushes over the commutator, also sparking a little as they go. Tiny vibrations when you just turn one in your hand, but up at 30,000 RPM, it doesn't take much displacement to fill a room with noise.
I probably shouldn't delve too deeply into mechanical analogs, anyway; MEs have it harder I think. Whereas E&M is mostly 0-1 dimensional until very high frequencies (~GHz) where 3D fields take over, mechanics are almost inseparably 3D; and not only that, but solids undergo so many more modes of motion (each carried by a wave of a different velocity!). We might write an EM field matrix, but they have to write a strain
tensor! But also to, er, sort of balance that out... I think most of them just don't care, and wing it most of the time?
When you're doing so much experimentally anyway, I guess it doesn't matter all that much. (See, I can conceive of these models, easily enough -- but damned if I want to solve them, I'll gladly simulate E&M fields much simpler than that!) You were born with all the instruments you need -- your hands and ears tell all, or a microphone or accelerometer if you need finer resolution or quantitative measurement.
By "0 dimensional", I mean you can draw an equivalent circuit -- a circuit, in the abstract, has no dimension; we don't need to know the speed of light, or any lengths or anything, every node simply exists at the same instant in time. (The mechanical equivalent is a mass-spring diagram.) A one-dimensional circuit would involve transmission lines (which have length, but not width).
Going back to circuit EMI -- we can hand-wavingly guess that, if we're measuring signals on the order of mV on the scope, or ~60dBuV on the spec, and those signals are going out on long wires -- we should probably be concerned. From there, more or less... play it by ear, as the mechanical types do.
Tim