Author Topic: Read-back latch for IO port  (Read 904 times)

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Offline dferyanceTopic starter

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Read-back latch for IO port
« on: February 12, 2020, 11:17:40 pm »
I've been building a Z80 computer lately and had an idea for a device i'd like to put on the data bus which requires a latch. I'd like an 8-bit latch that I can write to and read from as an IO port. So the data pins need to be I/O with enable pins. But I also need it to have normal output pins for the state so I can use the stored state in other circuitry. For simplicity, assume they are switching some LEDs to show the current state. It also needs to have a clear pin so I can reset on CPU reset.

I can handle the address decoding and enable signals well enough, but finding a latch that 1. can be read back from, 2. also has normal state output and 3. is re-settable has been quite difficult. With the Z80 I also have to deal with 5V TTL levels as well. While i'm trying to use DIPs to stay vintage I'm open to SMT packages.

The perfect chip I found is the 74als666, however it basically doesn't exist anymore. TI lists it as active but it is only available in backorder / large quantities (well large for a hobby). Mouser has a grand total of 1 in stock and I'd like to have a few. Are there any alternatives? I haven't really found any. The alternatives I found either don't support read-back or don't have a clear flag. The closest I've found is the 74ABT843. Not quite the same, 9-bits instead of 8 but I think it might work. I've not worked with the ABT logic family but the logic levels look ok.

I thought about using some GALs as I have some 22v10 and 16v8s but they don't have enough IO pins. I need 8 tri-state pins to drive the data lines for reading and 8 pins to drive other circuitry. I could do a multi-chip solution with a tristate buffer but everything is so close to being a single-chip solution that I haven't switched to that.

Any thoughts over some other options I may be missing? It seems like a simple idea to have an 8-bit IO register connected to a bus but also with normal outputs.  I feel like I have to be missing something.
 

Online David Hess

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Re: Read-back latch for IO port
« Reply #1 on: February 13, 2020, 09:28:25 pm »
The more esoteric chips are mostly out of production.

What is wrong with a multichip solution?  Use the read/write signal to select between the tri-state output buffer and the input latch during decoding.  Then double up to create another port to control the tri-state lines so 2 addresses decode into 4 chips and you can also read back the tri-state status.  One possible benefit of this is that you may be able to use a tri-state output more suitable to your output requirements rather than being stuck with standard drive TTL.

On early Z80 era computers, it was common to not be able to read back the state of an output port, and this is still sometimes the case with modern hardware.  The solution in the past was to use a shadow register so every write to the port included a write to the shadow register, or the shadow register was periodically copied to the port during an interrupt, and then the shadow register could be read back at any time to determine what value the port was set to.  Of course this did nothing to reveal if an output bit was stuck.
 

Offline dferyanceTopic starter

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Re: Read-back latch for IO port
« Reply #2 on: February 13, 2020, 11:09:52 pm »
Quote
What is wrong with a multichip solution?  Use the read/write signal to select between the tri-state output buffer and the input latch during decoding.
Nothing really wrong with it. As this is just a hobby project I can do whatever. In many ways I've made this artificially difficult on myself by soldering on perfboard instead of making a PCB. So more chips mean a ton of more jumpers for me. And then I can also run out of space. Also some of the fun is trying to find a really simple / elegant solution.

I initially started out with not planning to support reading the value back. I don't really need it for my needs. So I guess it is a case of why not? instead of really needing to do it.

But yeah, right now i'm leaning towards a multi-chip solution. I've been building up the logic in logisim and think I know what I need.

 


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