Author Topic: Reading GALs / implementing shared data-address bus  (Read 4397 times)

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Offline gmichael225Topic starter

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Reading GALs / implementing shared data-address bus
« on: November 19, 2016, 05:03:53 pm »
Hi all,

I've got an old lighting control console here with a bunch of separate button/fader/LCD banks that share an 8-bit data bus with the CPU, alongside "MUX", "DS", "ALE" and "RW" signaling lines.

My best guess is that DS is "Data Strobe" and maybe ALE is "Address Logic Enable".
I know RW is Read/Write, because it's wired up to the direction pin of the 74HC245.
No idea on MUX (other than "multiplex", of some sort).
But it's hard to know for sure what these are intended to do or how to drive them because they're wired up to a pair of GALs that I don't know the programming for.

At the moment I'm assuming that you're meant to alternate between writing an address to the bus, and reading/writing data to/from the bus.

So I'm going:
 - Write address to bus (e.g. "3")
 - Pulse ALE to load address into IC3 (octal flip-flop), which IC5 (address decoder) will then use to take DEC high and enable IC4.
 - Set RW high (read) + DS high, so that data will flow from the "D" bus to the "DD" bus.
 - Change MCU DDR's to input, turn off pullup resistors
 - Read byte from bus
 - Set RW low (write) + DS low
 - Change MCU DDR's back to output

I've wired up an Arduino to the data + signaling pins, and I have the schematic for the board, but I'll be darned if I can get it to read any of the data from the module.

Schematic and current arduino code are attached!
 

Offline mikeselectricstuff

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Re: Reading GALs / implementing shared data-address bus
« Reply #1 on: November 19, 2016, 05:59:17 pm »
ALE is usually Address Latch Enable - latches 8 bits of address from the data bus. Look at an 8051 series datasheet for more details.
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Online edavid

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Re: Reading GALs / implementing shared data-address bus
« Reply #2 on: November 19, 2016, 06:18:28 pm »
ALE is usually Address Latch Enable - latches 8 bits of address from the data bus. Look at an 8051 series datasheet for more details.

It sounds more like an 8085 bus to me.

http://www.cryptomuseum.com/crypto/gretag/519/files/D8085AH.pdf
 

Offline gmichael225Topic starter

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Re: Reading GALs / implementing shared data-address bus
« Reply #3 on: November 20, 2016, 05:22:31 am »
Thanks, I appreciate the clarification re: ALE.

The docs on 8051 and 8085 busses seem to resemble (loosely speaking) what I'd assumed would be the case, i.e. that the address is written to the bus, ALE strobed, then data read/written to the bus. Still not sure why I can't get any data from it though, and am none the wiser as to the purpose of MUX or DS.

I'll keep trying things...
 

Online edavid

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Re: Reading GALs / implementing shared data-address bus
« Reply #4 on: November 20, 2016, 08:23:41 pm »
DS may be edge triggered.  Have you experimented with that?

MUX is more mysterious, but I wonder if it used a 16 bit CPU.
 

Offline gmichael225Topic starter

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Re: Reading GALs / implementing shared data-address bus
« Reply #5 on: November 23, 2016, 10:16:56 am »
Yeah - I've tried (first taking RW high and all other pins low):

 - Write address, latch in via rising ALE, leave ALE high
 - Write address, latch in via rising ALE, leave ALE high, take MUX high
 - Write address, latch in via rising ALE, leave ALE high take DS high
 - Write address, latch in via rising ALE, leave ALE high, take RW low
 - Write address, latch in via rising ALE, take ALE low
 - Write address, latch in via rising ALE, take ALE low, take MUX high
 - Write address, latch in via rising ALE, take ALE low, take DS high
 - Write address, latch in via rising ALE, take ALE low, take RW low

I've confirmed the address is being latched and decoded correctly by the '138, and I can even talk to subsystems on the board by removing the GALs and connecting the outputs via 10K resistors to pull-up / pull-down the subsystem enable lines manually.

It's just these GALs I can't figure out the behaviour of...
 

Online edavid

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Re: Reading GALs / implementing shared data-address bus
« Reply #6 on: November 23, 2016, 04:02:22 pm »
You should try leaving DS low through the whole address phase, then pulsing it when you want to read or write data.
(E.g. after you've presented valid data for write.)
 

Offline stj

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Re: Reading GALs / implementing shared data-address bus
« Reply #7 on: November 23, 2016, 05:18:48 pm »
so what desk is it?
it's starting to sound like something from Avolites.
 

Offline gmichael225Topic starter

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Re: Reading GALs / implementing shared data-address bus
« Reply #8 on: November 23, 2016, 09:18:09 pm »
You should try leaving DS low through the whole address phase, then pulsing it when you want to read or write data.
(E.g. after you've presented valid data for write.)

That's what I was doing in the 3rd and 7th cases above :)

Beginner question: is there a better way to represent the test cases and results than just writing out the procedure?
 

Offline gmichael225Topic starter

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Re: Reading GALs / implementing shared data-address bus
« Reply #9 on: November 23, 2016, 09:19:58 pm »
so what desk is it?
it's starting to sound like something from Avolites.

Jands Hog 1K, circa 1999.
 

Offline jonash

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Re: Reading GALs / implementing shared data-address bus
« Reply #10 on: November 11, 2018, 11:48:41 am »
Hi. Did you ever got this to work? I have been offered an identical controller (Hog 1000), but I have no interest in the original software. If I could get it working with my own software it would be of interest though.

Did you found out how to read and write to the modules?
 

Offline gmichael225Topic starter

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Re: Reading GALs / implementing shared data-address bus
« Reply #11 on: November 12, 2018, 12:41:27 am »
I got some way along - I can talk to all of the modules except the main LCD.

I've documented the process (partially) at https://hoguino.wordpress.com/.
 


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