Electronics > Beginners
Reading schematics that don't show inputs explicitly?
fourfathom:
And don't forget the power bypass capacitors! They aren't shown on this type of schematic, but will be necessary if you want to actually build it.
T3sl4co1l:
Indeed!
I tend to throw bypass caps in a pile in the corner of a schematic, and use them freely during layout (adding or removing some as needed).
Others like to associate them with respective chips. In that case, the chips will probably be drawn with power pins, with the respective cap hanging off the same pin. If you don't like gates with power pins, you can also make a final power "gate" and stick that off to the side (I think Eagle libraries use this by default? seems like I see it a lot in those schematics).
If doing professional work, you should be fluent in both styles.
For example I've used the first style, with customers accustomed to the second style, and took a few extra minutes to explain during review. Namely, noting where I'd put bypass caps, that the supplies were adequately bypassed, every chip has a cap nearby, just not necessarily the ones they had intended / were expecting (by locality on the schematic).
I tend to take it for granted that I do signal quality on the fly, and place capacitors on an as-needed basis; for maximum consistency I should update schematics to reflect placement (which was missing in the above example). Technically, it doesn't matter (the schematic is just a netlist, really), but there is extra meaning implied by schematic placement, and those meanings should match. :)
Tim
Brumby:
--- Quote from: mindcrime on August 04, 2019, 01:18:41 am ---
--- Quote from: rstofer on August 04, 2019, 12:19:19 am ---I'm not surprised that Vcc and Gnd are simply implied. That's pretty common practice. The circuit itself is demonstrating how to create an oscillator and details like Vcc and Gnd are not that important. A glance at the datasheet will disclose the requirement.
Once you have seen it a few times, it's no big deal.
--- End quote ---
No doubt. The problem is what happens *before* you've "seen it a few times". ??? :rant: :scared:
--- End quote ---
You get confused until:
- You look up a datasheet for the IC (when one is mentioned) and then follow your nose through it reading the text, examining diagrams and looking for things like power connections. Hopefully it makes sense.
- Over time you become familiar with general conventions and then one day the penny drops.
- You come the the EEVblog and ask!
TimFox:
--- Quote from: T3sl4co1l on August 04, 2019, 05:32:02 am ---Indeed!
I tend to throw bypass caps in a pile in the corner of a schematic, and use them freely during layout (adding or removing some as needed).
Others like to associate them with respective chips. In that case, the chips will probably be drawn with power pins, with the respective cap hanging off the same pin. If you don't like gates with power pins, you can also make a final power "gate" and stick that off to the side (I think Eagle libraries use this by default? seems like I see it a lot in those schematics).
If doing professional work, you should be fluent in both styles.
For example I've used the first style, with customers accustomed to the second style, and took a few extra minutes to explain during review. Namely, noting where I'd put bypass caps, that the supplies were adequately bypassed, every chip has a cap nearby, just not necessarily the ones they had intended / were expecting (by locality on the schematic).
I tend to take it for granted that I do signal quality on the fly, and place capacitors on an as-needed basis; for maximum consistency I should update schematics to reflect placement (which was missing in the above example). Technically, it doesn't matter (the schematic is just a netlist, really), but there is extra meaning implied by schematic placement, and those meanings should match. :)
Tim
--- End quote ---
I once had a student technician in our lab (in grad school) who took the pile of bypass capacitors in the lower left-hand corner of the drawing literally and simplified the system by substituting one large capacitor in the lower left-hand corner of the Vectorboard.
rstofer:
Extend to issue to FPGAs with 20 or more Vcc (and probably multiple levels) and ground. You will almost always see the power connections and the associated bypass capacitors (lots of them) drawn somewhere else on the schematic.
See page 7 of 12 for power distribution:
https://reference.digilentinc.com/_media/arty:arty_sch.pdf
Note the number of different voltages! Further, note the capacitor values 47nF, 470nF, 4.7uF in decade sequence. Dave did a video on decoupling capacitors and how different values are more appropriate for different frequency ranges. Here we see it in practice.
If I counted right, there are 46 power pins and 46 ground pins.
Most, if not all, of the devices, other than the FPGA itself, do have power and ground shown. But it's at the package level because we really aren't dealing with discrete logic.
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