EEVblog Electronics Community Forum
Electronics => Beginners => Topic started by: rednoka on October 31, 2021, 08:20:03 pm
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Hi All,
I am sure a lot of in-rush current questions have been asked so far. Now, I have a different version of it:
- For automobile hardware development, ISO16750-2-4-7 tests include a test for power (battery) inputs: the battery voltage swings from +28VDC to -28VDC, within 1 us.
- Therefore,a negative voltage surge, with dV/dt = 56V/us, is applied.
- If I use a good diode (with very short reverse recovery), no problem.
- If I use PMOS-based reverse polarity protection for less energy loss, I see a huge negative current (going back to the source) like 20-25Amps.
- The real reason is the 47uF input capacitor for the DC-DC converter. This capacitor is discharging very fast back to the source before the PMOS gate is closed. A kind of reverse inrush!
- It seems the classic PMOS reverse polarity circuit is slow for this high dV/dt.
- This may destroy my PMOS or other circuit depending on the duration.
- I tried a lot of circuitry to make PMOS act quickly, oh well, except for putting an inductor before the capacitors, nothing worked...
- Also my PMOS based inrush protector is not working for reverse inrush.
- I don't wanna use an inductor or diode if possible.
- Also price is a big concern, which prevents me from using off-the-shelf 4-5$ protection ICs.
- Any suggestions?
By the way, I am using another PMOS for forward-inrush current limiting, something like in this: https://itectec.com/electrical/electronic-pmos-inrush-current-limit-where-to-place-capacitor/ (https://itectec.com/electrical/electronic-pmos-inrush-current-limit-where-to-place-capacitor/)
However, this current limiting is only good for forward-inrush, not effective for backward/reverse inrush. I don't know the exact reason but my guess is the PMOS governing capacitors are full, and they will be discharging back to source like DC-DC input caps. But discharching caps are not able to control the PMOS I think. (Welcome any explanations here..)
(I added the simplest form of the schematic below for now. NOTE: Id is a current sensor, Vdiff is differential voltage sensor for simulation.)
(NOTE: Making C2 bigger solves the problem up to a point. But you almost need as much big capacitance as the input one.)
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A much different circuit is required to control Q1. As shown, the body diode of Q1 is responsible for initially powering the circuit, which then applies a controlled voltage to the gate to turn Q1 on reducing the voltage drop to zero. When the input voltage initially falls, nothing shuts off Q1 until the voltage is below the threshold voltage of Q1, which is already too late to limit the current.
The circuit which controls Q1 needs to monitor the voltage cross Q1, and turn Q1 on only when the input is higher or very close to the output. When the voltage and current reverse, Q1 must be shut off quickly. This is how line frequency transistor rectifiers do it to prevent attempting to discharge the input filter capacitor back into the power line when the voltage begins to fall from the peak of the AC line cycle.
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Hi David,
Thank you for your prompt reply. I understand that I need a much different control circuit for Q1. But I have problems:
1.) How to control (on/off) Q1?
- It is not easy because of protective zener diode and the current must flow to make zener work. I have tried to short gate and source of PMOS with a BJT, it does not work somehow in the simulations.
2.) How to detect reversed polarity fast enough to trigger the control of Q1?
- I have tried to detect the undervoltage, for example block the Q1 if voltage goes below the 8V. It is not fast enough, at least my design.
- I have tried to detect the reverse current, for example 2Amps in reverse direction. This was fast, but only producing a very short peak voltage spike. I needed a memory element (like a flip-flop) to make it work, and another circuit to power the memory element and then I need to reset it back somehow and it goes complicated and expensive.
I appreciate it if you direct me to the related resources (books, example schematics etc.) you know. I have searched the net but no luck for the reverse inrush (except NTC, PTC and coils).
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Hi Everybody,
I solved my problem. Here how I got there:
1.) As I said before: Making C2 cap (under Zener) bigger works up to a point. Over 1uF, it is not helping much.
2.) I lowered the protective Zener diode's breakdown voltage just a bit above the Vgs threshold of the PMOS. For example the Vgs(th) is 3V, use 3V9 or 4V2 Zener. Not bigger.
This helped a lot. Now I can handle 470uF load with a <1A reverse inrush instead of 20-25A.
Thanks, hope this helps you as well.
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The way I have seen it done is with a comparator across each MOSFET. When the voltage across the MOSFET is "forward", the MOSFET is turned on and the current through the drain resistance provides just enough voltage to keep the comparator turning the MOSFET on. When the current reverses indicating that the input capacitor is now discharging through the source, the comparator switches and turns the MOSFET off.
The comparator may be a common integrated comparator, or sometimes is a variation of a two transistor comparator but because of the low MOSFET drain resistance with on, the signal is only millivolts so some attention has to be paid to having low input offset voltage for the comparator no matter what form it takes.
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Hi David,
Thank you for your suggestions. I will try to develop a circuit around the idea, hopefully, I got it correct :)
One question though; how to power the comparators?
- Will a basic Zener regulator be enough or should I use a normal regulator IC?
- Also, the power (from the battery) is having a polarity-change-surge at that moment and I may need to check the voltage regulator will not be affected from this surge as well.
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You can use an NMOS with a charge pump controller eg LM74610
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One question though; how to power the comparators?
That is the trick all right, and the voltage at the pins of the MOSFET have to be within the comparator's common mode input range.
- Will a basic Zener regulator be enough or should I use a normal regulator IC?
A zener shunt regulator is probably the way to go.
The two transistor variation requires a matched pair to get a low enough offset so may not be as economical as the more complex version which uses an entire integrated comparator.
The LM74700 is a MOSFET ideal diode controller (https://www.ti.com/lit/an/slvae57b/slvae57b.pdf?ts=1635876205187&ref_url=https%253A%252F%252Fwww.google.com%252F) which uses the comparator method may give you some ideas.
Here is an example of the two transistor comparator method (https://www.microfarad.de/blog/the-ideal-diode/), but it may require some help to get a faster turn-off.
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Hi Terry,
Thank you for the suggestion. I have looked at the datasheet and it says "Fast 2-µs Response to Reverse Polarity", which is too slow for a -56V/us power surge.
I've checked other versions, like LM74700-Q1, which has a 0.75us response time, even this is too slow, 42V is leaked inside.
I need a response time in the order of nanoseconds.
Also, all these kinds of automotive ICs are out of stock right now due to the chip production crisis :(
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Why do you think 2µs is too slow? It will still reduce the current surge considerably.
What are the requirements for maximum reverse current?
Have you actually built anything? All you've shown so far is a simulation. A real life circuit will have inductance so it won't be as bad.
Either way, you won't be able to beat a Schottky diode for speed.
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Hi Terry,
I will build the current solution (1uF cap + lower-threshold Zener diode) and try it. I will let everybody know the results after the tests.
I want to try one of those ideal diode ICs but they are out of stock currently. Maybe I can buy them when available and use them on the next design after testing.
I have already added some stray inductance to parts of the simulation circuit, and I will add more for a more realistic simulation.
However, 2us in over-the-paper calculations seemed too much to me. In 2us, it will leak the whole -58V/us@1us pulse in theory.
I don't wanna use the diode since it will generate heat and the target box is an IP67 plastic enclosure with no openings for cooling the system. So the less heat I produce the better.
Thanks for your advice.
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If you want the ultimate protection, use a delay line to stop the inrush before it happens!
It works, many radio transmitters use this method for lightning protection.
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I've checked other versions, like LM74700-Q1, which has a 0.75us response time, even this is too slow, 42V is leaked inside.
I need a response time in the order of nanoseconds.
There are comparators fast enough to do that, and even the two transistor version should be able to get below 100 nanoseconds, but extra attention will have to be paid to quickly removing charge from the MOSFET gate.
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Too right! If you can turn on a power MOSFET in nS you are guaranteed a job as head of engineering - of the world!!
A GanFET might just about do it in a circuit that is parasitic free with few amps per nS of gate drive.
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Too right! If you can turn on a power MOSFET in nS you are guaranteed a job as head of engineering - of the world!!
A GanFET might just about do it in a circuit that is parasitic free with few amps per nS of gate drive.
I took that to mean 10s of nanoseconds since that is the practical limit for silicon power MOSFETs. If my comparator response is 200 nanoseconds, then I don't care if the MOSFET turn-off time is another 200 nanoseconds. A moderately fast comparator could be 50 nanoseconds and with come care, 50 nanosecond turn-off of a MOSFET is feasible.