Why use an inductor between VDD and VDDA?

[jimon]

Was looking through schematics of STM32F7 discovery board (page 34) and found something that I don't really understand:
- Why use inductor between VDD and VDDA there?
- Any ideas why they are even trying to connect VDD to VDDA?
- Why not just tons of decoupling in the connection point instead?

PS. Buzzwords for RTFM are welcome! 

[wraper]

- Why use inductor between VDD and VDDA there?

To prevent high frequency noise from getting into the analog supply.

- Any ideas why they are even trying to connect VDD to VDDA?

Because they can get  away with single 3.3V supply.

- Why not just tons of decoupling in the connection point instead?

I'm sure there is already enough of decoupling capacitors. Also you are not supposed to hunt the birds with a cannon. Why do this the hard way by trying to suppress the interference which already got there, when you can prevent it leaking into analog supply in the first place.

[T3sl4co1l]

Caps don't filter much at all, they just provide a low impedance at the pin.  Inductors allow them to filter more frequencies.

The downside is, the inductor increases impedance, particularly at the F = 1 / (2*pi*sqrt(L*C)) resonant frequency.  You need to make sure this impedance is low enough at all frequencies, otherwise you will end up making things a whole lot worse!  It can be very helpful to add damping, such as by making the capacitor lossy: connecting a larger capacitor in parallel, which has modest ESR.

Tim

[danadak]

Two cents -

1) Use a combo of .01 and .1 uF ceramic disk, and a polymer tant. The latter
is ~ 10x better Z(f) performance than an ordinary tant. The tant provides bulk
energy storage to supply power rails when transients occur. The ceramics handle
high freq noise and transients due to low esr.

2) The L effectively decouples noise from source to device. Adds additional noise
suppression.

3) Actually examine Cap datasheets, youd be surprised at the variation, for the same
capacitance, they have in esr performance and C vs V performance.

All this becomes critical as the lsb value of an A/D falls. A 10 bit A/D with a 5V ref is
~ 1 LSB = 5 mV. At 20 bits that becomes 5 uV. Use your scope on infinite persistence
and look at supply rails for pk-pk noise, its challenging to fix.

Regards, Dana.

[T3sl4co1l]

Two cents -

1) Use a combo of .01 and .1 uF ceramic disk, and a polymer tant. The latter
is ~ 10x better Z(f) performance than an ordinary tant. The tant provides bulk
energy storage to supply power rails when transients occur. The ceramics handle
high freq noise and transients due to low esr.

FYI, this is three points of oft-repeated, never-tested, and physically-false information!

1. Pairing ceramic capacitors is silly. It doesn't accomplish anything, can make things worse, and
1a. Definitely is useless with THT ceramic disk capacitors.  (What is this, the '70s? )
2. Z(f) being as low as possible is typically the worst option.  For bulk bypass, you want modest ESR, not least.  Regular tantalum is best for this, followed by either electrolytic (but ESR varies with temperature and age) or ceramic + resistor (tedious, but very accurate and reliable).  Polymer types are best avoided, except where absolutely necessary in DC-DC converter applications.
3. There's no such thing as "bulk storage".  The amount of energy drawn from a >>1uF capacitor, during a digital logic switching transient, is very damned close to zero!  The only reason you need a large capacitor, is to introduce damping via ESR.  The capacitive reactance needs to be smaller than the ESR for this to work; since the other capacitors in the circuit resonate at the same reactance, the bulk cap needs to be a larger value.  You're simply connecting a resistor in parallel with the network, and the coupling capacitor (that prevents sinking ~amps of DC) simply needs to be large enough.  Likewise, excessively large caps are useless; you only need 2.5 to 10 times the total (small or distributed) capacitance on the net.

Instead:
a. Consider the impedance.  Not just the magnitude, but the complex impedance.  Putting two capacitors in parallel, where their rising and falling slopes cross, causes their reactances to cancel out, leaving a much larger resistance to remain.  This increases the supply impedance at the resonant frequency!
a1. Realize that SRF specs, or Z(f) curves above SRF, are essentially useless.  Trace inductance adds in series with capacitor ESL.  You can only analyze a power distribution network as a whole, including PCB layout.
b. Consider the requirement.  If the pin only requires some ~mA of current consumption, it won't need a low impedance bypass.  Scale all L and C in the circuit so that they are appropriate to the demands.  No sense in trying to design too low of an impedance (by using too little L and too much C).
c. Consider the damping.  Since inductive and capacitive reactances cancel in some intermediate range, you should provide a low *resistance* in parallel.  This is usually ESR.  (It can also be a lossy inductor, which ferrite beads are often touted for, but beware of the frequencies over which this is true, and what happens under DC bias.)  The ESR dominates at those resonant frequencies, preventing the supply impedance from rising more.

Tim

[danadak]

1a. Definitely is useless with THT ceramic disk capacitors.  (What is this, the '70s? )

Totally agree, that was 70's thinking 


For bulk bypass, you want modest ESR, not least.

This depends on what you are doing with the cap, if a DC/DC output with specified min ESR
I would agree. Otherwise choosing a charge source with higher esr makes absolutely no sense.
Unless of course your design seeks larger transients. And Pdiss.


Polymer types are best avoided

This would be my answer to why use polymer, basically a better cap     https://en.wikipedia.org/wiki/Polymer_capacitor
http://www.nepp.nasa.gov/docuploads/0EA22600-8AEC-4F47-9FE49BAABEAB569C/Tantalum%20Polymer%20Capacitors%20FY05%20Final%20Report.pdf


"There's no such thing as "bulk storage".  The amount of energy drawn from a >>1uF capacitor, during a digital logic switching transient, is very damned close to zero!  The only reason you need a large capacitor, is to introduce damping via ESR."

Not exactly, oversimplification. This is very much a function of load, layout, physical distance load to source (power supply),
control loop and sense point of regulation......If talking about just logic would concur. If relays, solenoids, servos, motors
bulk storage very much a consideration.


a. Consider the impedance.  Not just the magnitude, but the complex impedance.  Putting two capacitors in parallel, where their rising and falling slopes cross, causes their reactances to cancel out, leaving a much larger resistance to remain.  This increases the supply impedance at the resonant frequency!

http://www.allaboutcircuits.com/technical-articles/clean-power-for-every-ic-part-2-choosing-and-using-your-bypass-capacitors/
Discusses the anti res peak, but is not a recomendation to omit paralleling of capacitors. Not in the least is the resonance having
any effect on a spectrum that does not exist in the range of this peak  Again application dependent.


You can only analyze a power distribution network as a whole, including PCB layout.

Exactly, and that includes load considerations, passive performance including SRF and beyond,
C vs V in the technology, T......

As an aside thanks for illuminating the beyond SRF problem in paralleling, I have a VNA, plan on
taking a look at this, especially the magnitude of the degradation of ESR.


Regards, Dana.

[Brutte]

- Why use inductor between VDD and VDDA there?
- Any ideas why they are even trying to connect VDD to VDDA?
- Why not just tons of decoupling in the connection point instead?

The inductor is a part of the filtering circuit.
This ADC does not have an infinite PSRR. It is designed to reject as much as technically possible by design but eventually if you inject some sin on the AVCC, it would come out on ADC_DR (adc data register) attenuated to some extent (datasheet is your friend). Another fact is that there is no zero output impedance voltage controller on that board so any non-constant load (like for example a 208MHz micro) causes VCC swing.
If you add 1+1 you would come to the conclusion that tying VCC to AVCC and stating we have 12 bit adc inside is doable but would require 3 kilograms of decoupling caps because the R in that RC is pretty low there. Thus it is cheaper to RC decouple a micro that is not very picky in terms of input voltage and to LC decouple an AVCC as it draws uA range currents.
Of course the LC attenuation has steeper frequency characteristics than RC. It would be better to do LCLC...LC but as the ADC is only 12-bit, ST just did not bother.

BTW, PSRR for raw ADCs is usually in the range of 70-90dB so this is a minor problem. Consider that AREF rejection ratio is/should be 0dB and any noise there goes directly through to ADC_DR without attenuation and that is what one should be concerned.

[ConKbot]

One thing to point out is that the "inductor" in question is actually a ferrite bead. Depending on the model, somewhere in the 10's to 100's of MHz range they are more lossy and provide resistance instead of inductance. 50-60 MHz for that particular bead.

As others said, it functions to add impedance, a few hundered ohms for the specified one (that drops off drastically with current through them, don't expect miracles from chip beads) but a capacitor with sub 100milliohm impedance makes for a decent filter, even if the ferrite trips down to a few 10s of ohms of impedance.

They also tend to act as fuses if they are on power rails that get overloaded or shorted. But that's usually not intentional by design.

[T3sl4co1l]

This depends on what you are doing with the cap, if a DC/DC output with specified min ESR
I would agree. Otherwise choosing a charge source with higher esr makes absolutely no sense.
Unless of course your design seeks larger transients. And Pdiss.

It's all about the frequency.

"Ceramic caps right at the IC pins", ESL and antiresonance is all about high frequency stuff.  Very, very low energy up there -- not enough time to cause any worthwhile dissipation!

Or to put it another way:

If you have a high power RF amplifier*, yes, you can have considerable energy at high frequencies.  Logic circuits have only a small fraction, due to switching harmonics.  We need to provide a low enough impedance to keep the voltage stable, but beyond that -- no worries.

*Which isn't that obscure; GSM and Wifi (AP) radios can be quite hungry. One would hope they've filtered the RF from their supply rails, within the module, though! 

This would be my answer to why use polymer, basically a better cap     https://en.wikipedia.org/wiki/Polymer_capacitor
http://www.nepp.nasa.gov/docuploads/0EA22600-8AEC-4F47-9FE49BAABEAB569C/Tantalum%20Polymer%20Capacitors%20FY05%20Final%20Report.pdf

I do seem to be overreacting, as I see modest ESR polymer aluminum and tantatum parts on Digikey.  But by and large, the vast majority are quite low (1-100 mohms?).

Offhand, I count 343 AlPolys with ESR >= 200mohm, versus 7542 with ESR <= 100mohm, and 616 vs. 4473 for TantPolys, with the same selectors respectively.

Meanwhile, it's backwards for conventional tantalum: 28350 (>= 200mohm) vs. 5178 (<= 100mohm).  Most critically, the 0.2-2 ohm (inclusive) range counts 18737, a huge population of very reasonable, and rather convenient, ESR values.

So, as a generalization, it's safer to recommend any poly cap for very low ESR applications, dry tants for medium ESR, and electrolytic for "don't care"/"deal with it".  AKA trap for young players: always check the ESR you're buying, and that it's appropriate for your circuit.

Sure is handy that ESR is such an important parameter for these (also rather expensive) capacitor types... selecting (conventional) aluminum electrolytics, for any ESR at all (1.1mohm to 2.3kohms!) reduces the population from 100k to 33k!  Not that the ESR rating is all that useful or practical in the first place, unfortunately.

Not exactly, oversimplification. This is very much a function of load, layout, physical distance load to source (power supply),
control loop and sense point of regulation......If talking about just logic would concur. If relays, solenoids, servos, motors
bulk storage very much a consideration.

Ah, but you see where this is going, right?   Those are slow loads, i.e. they only draw current gradually over some microseconds, milliseconds even.  The supply disturbance has had plenty of time to propagate upstream, away from any local bypass caps.  By the time you start drawing much energy from "bulk caps", the supply itself (whether switching or LDO) is ready to kick in and stabilize the voltage.  So, truly, very little energy is needed from the bulk caps, and they're mostly there for filtering SMPS ripple, or stabilizing an LDO (or... damping the PDN).

Or, if you don't have a supply nearby, like a board at the end of some meters of control wiring -- and therefore quite some microhenries away from a true voltage source -- it may be quite necessary to use a large, juicy electrolytic capacitor on it!

And, often, an SMPS is so beefy (10A+?) that you need the low impedance of polymer caps, just to handle the sheer ripple current.  In that case, you may have to take precautions to avoid supply ringing (keep the supply impedance low, along the route; or add LRC components at the near or far end, to keep its impedance bounded).

Exactly, and that includes load considerations, passive performance including SRF and beyond,
C vs V in the technology, T......

As an aside thanks for illuminating the beyond SRF problem in paralleling, I have a VNA, plan on
taking a look at this, especially the magnitude of the degradation of ESR.


Regards, Dana.

Ooh, shiny.   Real measurements should be a good complement to such posts as this,
https://www.eevblog.com/forum/blog/eevblog-859-bypass-capacitor-tutorial/msg893314/#msg893314

Cheers,

Tim

[danadak]

Dave does some crude measurements here -





Regards, Dana.