Author Topic: Question on Class D amplifier high side  (Read 413 times)

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Offline poorren

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Question on Class D amplifier high side
« on: March 15, 2019, 03:59:10 am »
Hello guys,
Here's a design for driving sensor. To achieve high efficiency, I choose class D amplifier.
The capacitive load will be driven by two complementary pulse, with 40us period, 20us phase offset, 2us pulse width. (V1 and V3)
In ideally, the charge will be push forth and pull back from load.

The issue now is the high side pmos could be switched on instantaneously.
Based on simulation result, the pmos's drain will be pulled down when the high pulse is applied on Q5. (the high side is switch off before this moment.)
The parasitic capacitor between drain and gate will pull down the voltage on gate, it's about ~23V (See attachment 2), and switch on pmos.  :scared:
Because the only charge path to this capacitor is through 20k resistor (R3), so, this errornous switch on period is relative long. And this will lead to large current and lots of heat.

Note: I have add some circuit to help high side pmos accelerate switch off speed (Q3), but these couldn't help for this case.
I wonder if there's way to avoid this behavior and keep high side pmos be queit and cool.  :-//

Thanks advance!
« Last Edit: March 15, 2019, 04:03:27 am by poorren »
 

Offline Zero999

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Re: Question on Class D amplifier high side
« Reply #1 on: March 15, 2019, 11:49:36 am »
Where is the load? There's nothing to limit the current through C2. All that will happen is it'll pass large current spikes, which will heat up the transistors.

As far as the dead time is concerned, why not just use a class D amplifier IC or half bridge MOSFET driver IC?
 

Offline poorren

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Re: Question on Class D amplifier high side mosfet
« Reply #2 on: March 19, 2019, 04:43:14 am »
The load is a piezo ultrasonic transducer, so, I choose to model it with Butterworth-Van Dyke model, ie., C2//(R10-L10-C3). The real value is picked up from Murata's datasheet.

The goal of my design is to drive transducer with high voltage (~200V) and fast slew rate pulse, while the output power is not high, several Watt.
Because the input signal is pulse, which inherently looks like PWM, so the class d circuit is my first choice. And the final design would be full bridge driver to further lift the power.

When I tried to design this circuit, I didn't find any class d power amplifier ic which could support such high voltage. The catelogue I searched is audio class d amplifer. Maybe I missed something, and went the wrong way. However, those audio power amplifier (Class AB or class D) are designed for high power, not for high voltage.

Is there any off-the-shelf product for this design? I noticed tons of half bridge MOSFET driver for power supply, and I'm not sure if those drivers are suitable here.

Anyway, thanks advance!!!

The question for circuit now is when I switch on low side mosfet, the high side mosfet will errornous switch on, which waste lots of power and slow the discharge process. And I haven't find a way to eliminate it.
 


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