MCLK of I2S shared with multiple slaves, how to keep signal integrity?

[hitech95]

I have the following architecture on a project I'm creating:


The source is bus master, the MUX and the AMP are slaves.
Both the AMP (tas5731m) and the MUX (pcm9211) requires the MCLK clocks.
The Mux also require an external 24.576Mhz clock. This can be provided by both a crystal or an external source.

The i2s data source is in a baseplate and each baseplate have different slots for more AMP boards. (One source is a I2S ADC and the other is a USB CODEC)
Right now the I2S busses of the baseplate have a buffer after the source to give the bus enought drive strength to all the slots. (there are 5 slots)
The bus is series terminated and it should be 50 Ohm impedance matched.
What would be the best way to archieve this?

Would it be a good idea/easier to use a clock driver and share the 24.576Mhz clock with all  the slot in boards intead of having a crystal on each board?

For reference design I'm using:
https://www.ti.com/lit/df/tidrt10/tidrt10.pdf
https://www.ti.com/lit/an/scaa082a/scaa082a.pdf
https://www.ti.com/lit/ds/symlink/tas5731m.pdf
https://www.ti.com/lit/ds/symlink/pcm9211.pdf

[hitech95]

Does someone have some info on PCB routing of I2S signals? 

[hitech95]

No one?