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Sensing (interfacing) high voltage with arduino or any Microcontroller

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Laszlo:

--- Quote from: fourfathom on September 05, 2019, 07:10:16 am ---So another parameter that would be good to know is the source impedance of the high-voltage source.  How much current can you draw from these sources?

--- End quote ---

I am trying to design it in a way so it would draw the least amount of current from the source. Under 0.5mA was my target.


--- Quote from: ledtester on September 04, 2019, 10:01:01 pm ---Where do you see the advisory about the 100R resistor? I've looked at a couple of datasheets but couldn't find any reference to it.

--- End quote ---

Page 4 Figure 6. In here; https://www.nexperia.com/products/analog-logic-ics/asynchronous-interface-logic/voltage-translators-level-shifters/series/74HC4050.html


--- Quote from: ledtester on September 04, 2019, 09:16:07 pm ---1 M is a huge value for a pull down/pull resistor - most pull-ups in logic circuits are less than 10K. With a 1M pull-down you'll get a logical state change with only microamps flowing through the transistor.  I am not an EE, but it seems the circuit would be prone to false triggering in the presence of noise.
Going with a smaller resistor value means you would have to expend at least a couple of milliamps through the opto-coupler led to fully turn it on.

--- End quote ---

The same issue, it would draw way too much current from source if I do that. I was/still hoping that I could make the 5V rail noise-free enough to eliminate false triggering. I've also considered using and LM324 to drive the 74HC4050, but I haven't tried that option yet.


--- Quote from: fourfathom on September 04, 2019, 09:42:22 pm ---So what is your of/off threshold voltage, and acceptable tolerance for that?  Absolute maximum and minimum voltage?  s there a good common ground between the high-voltage and the processor circuitry  or will there be significant common-mode voltages?  How far are these high voltage signals from the processor circuit?  Optoisolators may not be necessary (although they still may be a good idea.)  We can't help you optimize a circuit without knowing these parameters.

--- End quote ---


* 85-120Vdc is when the signal is considered to be on
* Grounds are fully separate on HV/LV
* The HV signals and LV will be on the same PCB, with suitable separation in between them. Physical distance is negligible.
* I just can't think of anything else other than the opto, to provide full galvanic isolation and keeping the price at a reasonable level
To summarize, you think I should be driving the driving the opto with more current, so it would be more stable? Is that really the only option? The circuit does work on breadboard, but I haven't tested it on the field yet. Before I start soldering, I'd like to make sure that it will have a fighting chance to perform.

Thanks for all the input!

Laz

Ian.M:
Sharp PC817X datasheet

You are running the opto in your circuit well below the recommended minimum current for If of 1mA.  You are on the dotted portion of the transfer characteristic curve (datasheet fig.6), below 0.5mA, which I would read as probably being extrapolated data, not to be relied on. 

If you decrease the pull-down in an attempt to improve reliability, device to device variation of the opto's CTRR between batches and even on the same reel is probably going to bite you in the ass, and result in a significant number of failures.  CTRR also declines with age as the LED output decreases and declines with increasing ambient temperature, so  if your design  doesn't have enough excess If margin, a specific individual opto that works on the bench today, in the field may not pull the output high reliably on a hot day a few years later.

A major design difference is whether the input channels need to be individually isolated, or whether they can share a common ground (with each other, not the MCU side). 

If the latter, it would be economic use comparator ICs to provide input buffering to allow you to use much higher divider resistances and thus reduce the loading on the voltage sources you are sensing.  It should be possible to go as low as 50 to 100 uA divider current without issues, if you are careful about layout, put slots under the upper divider resistors to increase creepage distance and clean the board thoroughly after assembly. Use an isolated DC-DC converter to power the comparators (and the opto-LEDs) from the Arduino side (but beware of the Arduino regulator's limited 5V output current).  Add a voltage reference IC to provide a stable and well defined threshold voltage for all the comparators to switch at.   

If you need more than about  four input channels, and you don't need a vary fast response, consider using a SPI I/O expander on the HV side of the isolation barrier and optoisolate the SPI bus.  There's three lines going MCU => SPI device, and one the other way, so that only needs one quad and one single optocoupler.  If your chosen I/O expander has a reset pin its probably worth hooking it up to the spare channel of the quad opto, or you could use that for a second /SS signal to access an extra I/O expander for more channels.  It may be worth swapping the single opto for a double to bring the expander's IOC interrupt output (if it has one) to the MCU side so you can hook it up to an interrupt input so your code doesn't have to poll the expander continuously.

ledtester:
Is this a one-off or will be it mass produced?

Besides driving the LED at a higher current you can reduce the value of the pull-up/down resistor by using a Darlington configuration on the low-voltage side, or use a opto-coupler that has a Darlington output.

Another way to reduce to power draw on the high voltage side is to have your microcontroller use an opto-isolated signal to briefly switch in the measuring circuit when it wants to know the state of the high voltage side. A measurement should take less than a millisecond, so you can save 1000 times the power if you only need to sample the high voltage side once a second.

fourfathom:

--- Quote from: Laszlo on September 05, 2019, 02:24:43 pm ---
--- Quote from: fourfathom on September 05, 2019, 07:10:16 am ---So another parameter that would be good to know is the source impedance of the high-voltage source.  How much current can you draw from these sources?

--- End quote ---
I am trying to design it in a way so it would draw the least amount of current from the source. Under 0.5mA was my target.

--- End quote ---

You might consider a more sensitive optoisolator.  I quickly searched Digikey and found this Toshiba TLP2703 :  https://www.digikey.com/product-detail/en/toshiba-semiconductor-and-storage/TLP2703-TPE/TLP2703-TPETR-ND/6051974.  This one seems to work well with 0.1 mA input current.  The output is a Darlington stage so the output saturation voltage won't be as high as a single-transistor output, but with 0.1 mA input current the output will sink at least 0.5 mA.  Use a 47k pull-up resistor feeding your CMOS Schmitt trigger and things should be good.

This device will let you scale up the input divider resistors to meet your requirements.

There may be better optos, perhaps ones with built-in logic-level Schmitt trigger outputs.  You should do some component research.

ledtester:

--- Quote from: Laszlo on September 05, 2019, 02:24:43 pm ---

--- Quote from: ledtester on September 04, 2019, 10:01:01 pm ---Where do you see the advisory about the 100R resistor? I've looked at a couple of datasheets but couldn't find any reference to it.

--- End quote ---

Page 4 Figure 6. In here; https://www.nexperia.com/products/analog-logic-ics/asynchronous-interface-logic/voltage-translators-level-shifters/series/74HC4050.html

--- End quote ---

I think it is just showing you what the input protection circuitry looks like for the device, not that you need to use a 100R resistor on the inputs.


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